在 2022-11-30星期三的 01:25 -0600,Samuel Holland写道: > On 11/27/22 07:24, Jisheng Zhang wrote: > > Sipeed manufactures a M1s system-on-module and dock board, add > > basic > > support for them. > > > > Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx> > > --- > > arch/riscv/boot/dts/Makefile | 1 + > > arch/riscv/boot/dts/bouffalolab/Makefile | 2 ++ > > .../dts/bouffalolab/bl808-sipeed-m1s-dock.dts | 25 > > +++++++++++++++++++ > > .../dts/bouffalolab/bl808-sipeed-m1s.dtsi | 21 > > ++++++++++++++++ > > 4 files changed, 49 insertions(+) > > create mode 100644 arch/riscv/boot/dts/bouffalolab/Makefile > > create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed- > > m1s-dock.dts > > create mode 100644 arch/riscv/boot/dts/bouffalolab/bl808-sipeed- > > m1s.dtsi > > > > diff --git a/arch/riscv/boot/dts/Makefile > > b/arch/riscv/boot/dts/Makefile > > index ff174996cdfd..b525467152b2 100644 > > --- a/arch/riscv/boot/dts/Makefile > > +++ b/arch/riscv/boot/dts/Makefile > > @@ -1,4 +1,5 @@ > > # SPDX-License-Identifier: GPL-2.0 > > +subdir-y += bouffalolab > > subdir-y += sifive > > subdir-y += starfive > > subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan > > diff --git a/arch/riscv/boot/dts/bouffalolab/Makefile > > b/arch/riscv/boot/dts/bouffalolab/Makefile > > new file mode 100644 > > index 000000000000..5419964e892d > > --- /dev/null > > +++ b/arch/riscv/boot/dts/bouffalolab/Makefile > > @@ -0,0 +1,2 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > +dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-sipeed-m1s-dock.dtb > > diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s- > > dock.dts b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s- > > dock.dts > > new file mode 100644 > > index 000000000000..c6b4894a7b88 > > --- /dev/null > > +++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s-dock.dts > > @@ -0,0 +1,25 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > > +/* > > + * Copyright (C) 2022 Jisheng Zhang <jszhang@xxxxxxxxxx> > > + */ > > + > > +/dts-v1/; > > + > > +#include "bl808-sipeed-m1s.dtsi" > > + > > +/ { > > + model = "Sipeed M1s Dock"; > > + compatible = "sipeed,m1s-dock", "sipeed,m1s", > > "bouffalolab,bl808"; > > + > > + aliases { > > + serial0 = &uart0; > > + }; > > + > > + chosen { > > + stdout-path = "serial0:2000000n8"; > > + }; > > +}; > > + > > +&uart0 { > > + status = "okay"; > > +}; > > diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > > b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > > new file mode 100644 > > index 000000000000..5026de768534 > > --- /dev/null > > +++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dtsi > > @@ -0,0 +1,21 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > > +/* > > + * Copyright (C) 2022 Jisheng Zhang <jszhang@xxxxxxxxxx> > > + */ > > + > > +/dts-v1/; > > + > > +#include "bl808.dtsi" > > + > > +/ { > > + compatible = "sipeed,m1s", "bouffalolab,bl808"; > > + > > + memory@50000000 { > > + device_type = "memory"; > > + reg = <0x50000000 0x04000000>; > > + }; > > The PSRAM is part of the BL808, so this should go in the SoC .dtsi > file. > (Unless I'm missing something and there are BL808 variants with > different amounts of memory. The PSRAM init code in the SDK does size > detection, so I suppose it is possible.) I think it really has variants. > > Regards, > Samuel > > > +}; > > + > > +&xtal { > > + clock-frequency = <40000000>; > > +}; > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@xxxxxxxxxxxxxxxxxxx > http://lists.infradead.org/mailman/listinfo/linux-riscv