On Sat, Dec 03, 2022 at 05:00:15PM +0800, Chukun Pan wrote: > > Actually looking deeper in the TRM, having these registers "just" written > > to from the dwmac-glue-layer feels quite a bit like a hack. > > > The "pcs" thingy referenced in patch2 actually looks more like a real device > > with its own section in the TRM and own iomem area. This pcs device then > > itself has some more settings stored in said pipe-grf. > > > So this looks more like it wants to be an actual phy-driver. > > > @Chukun Pan: plase take a look at something like > > https://elixir.bootlin.com/linux/latest/source/drivers/phy/mscc/phy-ocelot-serdes.c#L398 > > on how phy-drivers for ethernets could look like. > > > Aquiring such a phy from the dwmac-glue and calling phy_set_mode after > > moving the xpcs_setup to a phy-driver shouldn't be too hard I think. > > Thanks for pointing that out. > The patch2 is come from the sdk kernel of rockchip. > The sgmii-phy of RK3568 is designed on nanning combo phy. > In the sdk kernel, if we want to use sgmii mode, we need > to modify the device tree in the gmac section like this: > > ``` > &gmac0 { > power-domains = <&power RK3568_PD_PIPE>; > phys = <&combphy1_usq PHY_TYPE_SGMII>; > phy-handle = <&sgmii_phy>; > phy-mode = "sgmii"; phy-mode tells you you are using SGMII. You can tell the generic PHY driver this which will call the PHY drivers .set_mode(). As said above, there are plenty of examples of this, mvneta and its comphy, various mscc drivers etc. Andrew
