On Fri, 02 Dec 2022 11:00:17 PST (-0800), patchwork-bot+linux-riscv@xxxxxxxxxx wrote:
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@xxxxxxxxxxxx>:
On Fri, 18 Nov 2022 09:17:06 +0800 you wrote:
The original patch series "Basic StarFive JH7110 RISC-V SoC support" [1]
is split into 3 patch series. They respectively add basic clock&reset,
pinctrl and device tree support for StarFive JH7110 SoC. These patch
series are independent, but the Visionfive2 board can boot up successfully
only if all these patches series applied. This one adds basic device
tree support. This patch series is pulled out from the patch 1~6 and
patch 27~30 of v1 [1]. You can simply get or review the patches at the
link [2].
[...]
Here is the summary with links:
- [v2,1/8] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive2 board
(no matching commit)
- [v2,2/8] dt-bindings: timer: Add StarFive JH7110 clint
(no matching commit)
- [v2,3/8] dt-bindings: interrupt-controller: Add StarFive JH7110 plic
(no matching commit)
- [v2,4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
(no matching commit)
- [v2,5/8] soc: sifive: ccache: Add StarFive JH7110 support
(no matching commit)
- [v2,6/8] riscv: dts: starfive: Add initial StarFive JH7110 device tree
(no matching commit)
- [v2,7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board device tree
(no matching commit)
- [v2,8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW
https://git.kernel.org/riscv/c/6925ba3d9b8c
You are awesome, thank you!
Looks like the bot is a little confused here, it's just that last patch
that's been merged.
