On Fri, Dec 2, 2022 at 5:36 AM Rob Herring <robh@xxxxxxxxxx> wrote:
>
> On Thu, Dec 01, 2022 at 06:09:54PM +0530, Anup Patel wrote:
> > We should set CLOCK_EVT_FEAT_C3STOP for a clock_event_device only
> > when riscv,timer-cannot-wake-cpu DT property is present in the RISC-V
> > timer DT node.
> >
> > This way CLOCK_EVT_FEAT_C3STOP feature is set for clock_event_device
> > based on RISC-V platform capabilities rather than having it set for
> > all RISC-V platforms.
> >
> > Signed-off-by: Anup Patel <apatel@xxxxxxxxxxxxxxxx>
> > Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> > Acked-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
> > ---
> > drivers/clocksource/timer-riscv.c | 12 +++++++++++-
> > 1 file changed, 11 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> > index 969a552da8d2..1b4b36df5484 100644
> > --- a/drivers/clocksource/timer-riscv.c
> > +++ b/drivers/clocksource/timer-riscv.c
> > @@ -28,6 +28,7 @@
> > #include <asm/timex.h>
> >
> > static DEFINE_STATIC_KEY_FALSE(riscv_sstc_available);
> > +static bool riscv_timer_cannot_wake_cpu;
> >
> > static int riscv_clock_next_event(unsigned long delta,
> > struct clock_event_device *ce)
> > @@ -51,7 +52,7 @@ static int riscv_clock_next_event(unsigned long delta,
> > static unsigned int riscv_clock_event_irq;
> > static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
> > .name = "riscv_timer_clockevent",
> > - .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP,
> > + .features = CLOCK_EVT_FEAT_ONESHOT,
>
> A platform that depended on CLOCK_EVT_FEAT_C3STOP being set will break
> with this change because its existing DT will not have the new property.
>
> It needs to be the other way around which would effectively be the
> existing 'always-on' property.
There are no RISC-V platforms using C3STOP. The patch which
added C3STOP has been reverted.
(Refer, https://lore.kernel.org/lkml/a218ebf8-0fba-168d-6598-c970bbff5faf@xxxxxxxxxxxx/T/)
I just need to rebase this patch upon the C3STOP revert patch.
>
> > .rating = 100,
> > .set_next_event = riscv_clock_next_event,
> > };
> > @@ -85,6 +86,8 @@ static int riscv_timer_starting_cpu(unsigned int cpu)
> >
> > ce->cpumask = cpumask_of(cpu);
> > ce->irq = riscv_clock_event_irq;
> > + if (riscv_timer_cannot_wake_cpu)
> > + ce->features |= CLOCK_EVT_FEAT_C3STOP;
> > clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
> >
> > enable_percpu_irq(riscv_clock_event_irq,
> > @@ -139,6 +142,13 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> > if (cpuid != smp_processor_id())
> > return 0;
> >
> > + child = of_find_compatible_node(NULL, NULL, "riscv,timer");
> > + if (child) {
> > + riscv_timer_cannot_wake_cpu = of_property_read_bool(child,
> > + "riscv,timer-cannot-wake-cpu");
> > + of_node_put(child);
> > + }
> > +
> > domain = NULL;
> > child = of_get_compatible_child(n, "riscv,cpu-intc");
> > if (!child) {
> > --
> > 2.34.1
> >
> >
Regards,
Anup
