On 29.11.2022 21:46, Adam Skladowski wrote: > Add display clock controller to allow controlling display related clocks. > > Signed-off-by: Adam Skladowski <a39.skl@xxxxxxxxx> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> Konrad > arch/arm64/boot/dts/qcom/sm6115.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index 6d14bbcda9d3..ea0e0b3c5d84 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -4,6 +4,7 @@ > */ > > #include <dt-bindings/clock/qcom,gcc-sm6115.h> > +#include <dt-bindings/clock/qcom,sm6115-dispcc.h> > #include <dt-bindings/clock/qcom,rpmcc.h> > #include <dt-bindings/gpio/gpio.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > @@ -717,6 +718,19 @@ usb_1_dwc3: usb@4e00000 { > }; > }; > > + dispcc: clock-controller@5f00000 { > + compatible = "qcom,sm6115-dispcc"; > + reg = <0x05f00000 0x20000>; > + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, > + <&sleep_clk>, > + <&dsi0_phy 0>, > + <&dsi0_phy 1>, > + <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > apps_smmu: iommu@c600000 { > compatible = "qcom,sm6115-smmu-500", "arm,mmu-500"; > reg = <0x0c600000 0x80000>;