On Sun, Nov 27, 2022 at 05:35:48PM +0000, Conor Dooley wrote: > Hey Jisheng, > > On Sun, Nov 27, 2022 at 09:24:47PM +0800, Jisheng Zhang wrote: > > Add Jisheng Zhang as Bouffalolab SoC maintainer. > > > > Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx> > > --- > > MAINTAINERS | 9 +++++++++ > > 1 file changed, 9 insertions(+) > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 00ff4a2949b8..a6b04249853c 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -17729,6 +17729,15 @@ F: arch/riscv/ > > N: riscv > > K: riscv > > > > +RISC-V BOUFFALOLAB SOC SUPPORT > > +M: Jisheng Zhang <jszhang@xxxxxxxxxx> > > +L: linux-riscv@xxxxxxxxxxxxxxxxxxx > > +S: Maintained > > +F: Documentation/devicetree/bindings/riscv/bouffalolab.yaml > > +F: Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml > > +F: arch/riscv/boot/dts/bouffalolab/ > > +F: drivers/tty/serial/bflb_uart.c > > I think I asked last time but I didn't see an answer on lore or my > mailbox - if you intend sending Arnd PRs for this stuff, please add a > git tree here. Otherwise, LMK and I'll bundle it with the other "misc > riscv devicetree" stuff. I forgot: Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > RISC-V MICROCHIP FPGA SUPPORT > > M: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > M: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> > > -- > > 2.38.1 > > > > > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@xxxxxxxxxxxxxxxxxxx > > http://lists.infradead.org/mailman/listinfo/linux-riscv
