On Fri, Nov 25, 2022 at 05:46:55PM -0600, Samuel Holland wrote: > Allwinner manufactures the sunxi family of application processors. This > includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8 > SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs. > > The first SoC in the sun20i series is D1, containing a single T-HEAD > C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM. > > Most peripherals are shared across the entire chip family. In fact, the > ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible > with the D1s. > > This means many existing device drivers can be reused. To facilitate > this reuse, name the symbol ARCH_SUNXI, since that is what the existing > drivers have as their dependency. > > Reviewed-by: Heiko Stuebner <heiko@xxxxxxxxx> > Tested-by: Heiko Stuebner <heiko@xxxxxxxxx> > Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> > --- > > Changes in v2: > - Sort Kconfig as if we had done s/SOC_/ARCH_/ for future-proofing > > arch/riscv/Kconfig.socs | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index 69774bb362d6..4c1dc2ca11f9 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -26,6 +26,15 @@ config SOC_STARFIVE > help > This enables support for StarFive SoC platform hardware. > > +config ARCH_SUNXI > + bool "Allwinner sun20i SoCs" > + select ERRATA_THEAD if MMU && !XIP_KERNEL Does this need to have the if MMU? I thought it only needed the !XIP_KERNEL since the PMU errata does not depend on MMU. Or have a missed some patch elsewhere that'll change that? > + select SIFIVE_PLIC This is v6.3 material right? One of the things that should be going for v6.3 is all of these select SIFIVE_PLICs. Palmer suggested putting up an immutable branch for any of that cleanup that intersects with new platforms, so I'll probably send one out at some stage. Thanks, Conor. > + select SUN4I_TIMER > + help > + This enables support for Allwinner sun20i platform hardware, > + including boards based on the D1 and D1s SoCs. > + > config SOC_VIRT > bool "QEMU Virt Machine" > select CLINT_TIMER if RISCV_M_MODE > -- > 2.37.4 >
