On Fri Nov 25, 2022 at 11:19 AM CET, Johan Hovold wrote: > On Fri, Nov 25, 2022 at 10:55:31AM +0100, Luca Weiss wrote: > > Hi Johan, > > > > On Fri Nov 25, 2022 at 10:50 AM CET, Johan Hovold wrote: > > > On Fri, Nov 25, 2022 at 10:27:47AM +0100, Luca Weiss wrote: > > > > Add the compatible describing the combo phy found on SM6350. > > > > > > > > Signed-off-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx> > > > > --- > > > > @Johan Hovold, I've sent this v2 as RFC because there are several things > > > > where I have questions on how it should be done. > > > > > > > > In this patch, you can see there's cfg_ahb (&xo_board) and power-domains > > > > is not set. In msm-4.19 &gcc_usb30_prim_gdsc is only used in the > > > > ssusb@a600000 node, or should I also add it to qmpphy? > > > > > > Yeah, you may need to add a platform specific section of the clocks, > > > which appear to be different, even if I'm not sure they are currently > > > described correctly (xo_board as cfg_ahb and "QLINK" as ref). How are > > > they named in the vendor's dts? > > > > This is the msm-4.19 dts: > > https://android.googlesource.com/kernel/msm-extra/devicetree/+/refs/heads/android-msm-bramble-4.19-android11-qpr1/qcom/lagoon-usb.dtsi#354 > > clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, > <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, > <&rpmhcc RPMH_QLINK_CLK>, > <&gcc GCC_USB3_PRIM_CLKREF_CLK>, > <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; > clock-names = "aux_clk", "pipe_clk", "ref_clk_src", > "ref_clk", "com_aux_clk"; > > So it looks like you don't need update the binding for the clocks as the > above matches sc8280xp: > > aux > ref > com_aux > usb3_pipe Thanks for checking! > > Parent clocks (ref_clk_src) should not be included in the binding, but > rather be handled by the clock driver. For example, see: > > https://lore.kernel.org/all/20221121085058.31213-4-johan+linaro@xxxxxxxxxx/ > https://lore.kernel.org/all/20221115152956.21677-1-quic_shazhuss@xxxxxxxxxxx/ So I assume you mean that I shouldn't do this: clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_QLINK_CLK>, <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", "usb3_pipe"; But for "ref" use GCC_USB3_PRIM_CLKREF_CLK? That also seems to work fine, also if RPMH_QLINK_CLK is not used from Linux-side (checked in debugfs). And for the driver patch, I've discovered that this phy doesn't have separate txa/tbx region, so dts was also wrong there. Do you know if there's a way to test DP phy initialization without having all the USB-C plumbing in place? Might be good to validate at least phy init works if we're already touching all of this. Regards Luca > > > > > .../bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 5 +++-- > > > > 1 file changed, 3 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml > > > > index 6f31693d9868..3e39e3e0504d 100644 > > > > --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml > > > > +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml > > > > @@ -17,16 +17,18 @@ properties: > > > > compatible: > > > > enum: > > > > - qcom,sc8280xp-qmp-usb43dp-phy > > > > + - qcom,sm6350-qmp-usb3-dp-phy > > > > > > > > reg: > > > > maxItems: 1 > > > > > > > > clocks: > > > > - maxItems: 4 > > > > + maxItems: 5 > > > > > > > > clock-names: > > > > items: > > > > - const: aux > > > > + - const: cfg_ahb > > > > - const: ref > > > > - const: com_aux > > > > - const: usb3_pipe > > > > > > So this would need to be moved to an allOf: construct at the end with > > > one section each for sc8280xp and sm6350. > > > > Ack. > > So no need to change this it seems. > > Johan
