On Sat, 19 Nov 2022 01:18:18 +0800, Emil Renner Berthing wrote:
> On Fri, 18 Nov 2022 at 02:06, Hal Feng <hal.feng@xxxxxxxxxxxxxxxx> wrote:
>>
>> The JH7110 clock drivers will not register redundant auxiliary
>> devices if the JH7110 reset auxiliary driver is disabled.
>>
>> Signed-off-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
>> ---
>> drivers/clk/starfive/clk-starfive-jh71x0.c | 11 ++++++++++-
>> 1 file changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.c b/drivers/clk/starfive/clk-starfive-jh71x0.c
>> index dda19c6937cb..4e69f56b00cc 100644
>> --- a/drivers/clk/starfive/clk-starfive-jh71x0.c
>> +++ b/drivers/clk/starfive/clk-starfive-jh71x0.c
>> @@ -333,7 +333,7 @@ const struct clk_ops *starfive_jh71x0_clk_ops(u32 max)
>> }
>> EXPORT_SYMBOL_GPL(starfive_jh71x0_clk_ops);
>>
>> -#if IS_ENABLED(CONFIG_CLK_STARFIVE_JH7110_SYS)
>> +#if IS_ENABLED(CONFIG_RESET_STARFIVE_JH7110)
>
> I don't see any reason you'd want to build a kernel that needs the
> clock driver but not the resets, so I don't think this is something we
> should optimize for. I'd just drop this patch and let such broken
> kernels register the auxiliary devices even when no reset driver is
> there to use them.
You're right. I made this patch just following the style of jh7100.
And I think it's better to select RESET_STARFIVE_JH7110 in config
CLK_STARFIVE_JH7110_SYS.
Best regards,
Hal
>
>> static void jh7110_reset_unregister_adev(void *_adev)
>> {
>> @@ -384,4 +384,13 @@ int jh7110_reset_controller_register(struct jh71x0_clk_priv *priv,
>> }
>> EXPORT_SYMBOL_GPL(jh7110_reset_controller_register);
>>
>> +#else /* !CONFIG_RESET_STARFIVE_JH7110 */
>> +
>> +int jh7110_reset_controller_register(struct jh71x0_clk_priv *priv,
>> + const char *adev_name,
>> + u32 adev_id)
>> +{
>> + return 0;
>> +}
>> +
>> #endif
