On 11/21/2022 9:23 AM, Georgi Djakov wrote: > Hi Melody, > > On 18.11.22 20:22, Melody Olvera wrote: >> Add documentation for virtual rpmh devices. These interconnects >> are not controlled by the application processor and thus >> require separate bindings. Also, move compatibles for sm8450 to >> this document and add them for QDU1000/QRU1000 platforms. >> >> Signed-off-by: Melody Olvera <quic_molvera@xxxxxxxxxxx> >> --- >> .../bindings/interconnect/qcom,rpmh-virt.yaml | 55 +++++++++++++++++++ >> .../bindings/interconnect/qcom,rpmh.yaml | 2 - >> 2 files changed, 55 insertions(+), 2 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,rpmh-virt.yaml >> >> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh-virt.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh-virt.yaml >> new file mode 100644 >> index 000000000000..5cbaa51df863 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh-virt.yaml >> @@ -0,0 +1,55 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interconnect/qcom,rpmh-virt.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm RPMh Virtual Network-On-Chip Interconnect >> + >> +maintainers: >> + - Georgi Djakov <georgi.djakov@xxxxxxxxxx> > > This email is not valid anymore, so please replace it with djakov@xxxxxxxxxx. Sounds good. Melody > > Thanks, > Georgi > >> + - Odelu Kukatla <quic_okukatla@xxxxxxxxxxx> >> + >> +description: | >> + RPMh interconnect providers support system bandwidth requirements through >> + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is >> + able to communicate with the BCM through the Resource State Coordinator (RSC) >> + associated with each execution environment. Provider nodes must point to at >> + least one RPMh device child node pertaining to their RSC and each provider >> + can map to multiple RPMh resources. Virtual interconnect providers are not >> + controlled by AP and do not support QoS; they should not have associated >> + register regions. >> + >> +allOf: >> + - $ref: qcom,rpmh-common.yaml# >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,qdu1000-clk-virt >> + - qcom,qdu1000-mc-virt >> + - qcom,sm8450-clk-virt >> + - qcom,sm8450-mc-virt >> + >> + '#interconnect-cells': true >> + >> +required: >> + - compatible >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/interconnect/qcom,sm8450.h> >> + >> + clk_virt: interconnect-0 { >> + compatible = "qcom,sm8450-clk-virt"; >> + #interconnect-cells = <2>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> + >> + mc_virt: interconnect-1 { >> + compatible = "qcom,sm8450-mc-virt"; >> + #interconnect-cells = <2>; >> + qcom,bcm-voters = <&apps_bcm_voter>; >> + }; >> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml >> index a429a1ed1006..bd474f49deb0 100644 >> --- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml >> +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml >> @@ -123,11 +123,9 @@ properties: >> - qcom,sm8350-system-noc >> - qcom,sm8450-aggre1-noc >> - qcom,sm8450-aggre2-noc >> - - qcom,sm8450-clk-virt >> - qcom,sm8450-config-noc >> - qcom,sm8450-gem-noc >> - qcom,sm8450-lpass-ag-noc >> - - qcom,sm8450-mc-virt >> - qcom,sm8450-mmss-noc >> - qcom,sm8450-nsp-noc >> - qcom,sm8450-pcie-anoc >
