The Loongson platforms GPIO controller contains 60 GPIO pins in total,
4 of which are dedicated GPIO pins, and the remaining 56 are reused
with other functions. Each GPIO can set input/output and has the
interrupt capability.
This driver added support for Loongson GPIO controller and support to
use DTS or ACPI to descibe GPIO device resources.
Signed-off-by: Jianmin Lv <lvjianmin@xxxxxxxxxxx>
Signed-off-by: Hongchen Zhang <zhanghongchen@xxxxxxxxxxx>
Signed-off-by: Liu Peibao <liupeibao@xxxxxxxxxxx>
Signed-off-by: Juxin Gao <gaojuxin@xxxxxxxxxxx>
Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
---
Change in v5:
1. Move legacy gpio driver to proper location.
2. Remove the "gpio_base".
3. Add of_device_id and acpi_device_id data field for platform
data.
4. Remove the ACPI_PTR().
5. Remove the gpio label judgement logic and use mode instead.
6. Drop platform_loongson_gpio_get_props.
7. Using devres for all resource.
8. Remove the loongson_gpio_remove.
9. Remove the unmatched print information.
10. Remove the loongson_gpio_exit.
Change in v4:
1. Fixup name spelling about Signed-off-by.
2. Drop "series" here and everywhere else.
3. Fixup the copyright in driver.
4. Drop the "else" in loongson_gpio_request.
5. Use trinocular operation replace the related logic.
6. Remove lable judgement in context about "lgpio->chip.to_irq =
loongson_gpio_to_irq"
7. Use dev_err replace pr_err in probe.
8. Make legacy platform_data should be left out of this patch.
9. Remove the mips config in gpio Kconfig.
Change in v3:
1. Move the gpio platform data struct from arch/ into include/linux/
platform_data/.
2. Replace platform_gpio_data with loongson_gpio_platform_data in .c.
3. Add maintainer in MAINTAINERS file for include/linux/platform_data/
gpio-loongson.h and gpio-loongson.c
Change in v2:
1. Fixup of_loongson_gpio_get_props and remove the parse logic about
"loongson,conf_offset", "loongson,out_offset", "loongson,in_offset",
"loongson,gpio_base", "loongson,support_irq" then kernel driver will
initial them that depend compatible except "loongson,gpio_base".
MAINTAINERS | 7 +
drivers/gpio/Kconfig | 10 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-loongson.c | 306 +++++++++++++++++++++++++++++++++++
4 files changed, 324 insertions(+)
create mode 100644 drivers/gpio/gpio-loongson.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 7b80a64b70b9..47721a25249f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12048,6 +12048,13 @@ S: Maintained
F: Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml
F: drivers/soc/loongson/loongson2_guts.c
+LOONGSON GPIO DRIVER
+M: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
+L: linux-gpio@xxxxxxxxxxxxxxx
+S: Maintained
+F: drivers/gpio/gpio-loongson.c
+F: include/linux/platform_data/gpio-loongson.h
+
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@xxxxxxxxxxxx>
M: Sreekanth Reddy <sreekanth.reddy@xxxxxxxxxxxx>
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index bc55b80f212a..3986b471647d 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -375,6 +375,16 @@ config GPIO_LOGICVC
Say yes here to support GPIO functionality of the Xylon LogiCVC
programmable logic block.
+config GPIO_LOONGSON
+ tristate "Loongson GPIO support"
+ depends on LOONGARCH || COMPILE_TEST
+ help
+ Say yes here to support the GPIO functionality of a number of
+ Loongson series of chips. The Loongson GPIO controller supports
+ up to 60 GPIOS in total, 4 of which are dedicated GPIO pins, and
+ the remaining 56 are reused with other functions, with edge or
+ level triggered interrupts.
+
config GPIO_LPC18XX
tristate "NXP LPC18XX/43XX GPIO support"
default y if ARCH_LPC18XX
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index cfd298e00737..29e3beb6548c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
+obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o
obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o
obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o
diff --git a/drivers/gpio/gpio-loongson.c b/drivers/gpio/gpio-loongson.c
new file mode 100644
index 000000000000..9fb65ba2c4bd
--- /dev/null
+++ b/drivers/gpio/gpio-loongson.c
@@ -0,0 +1,306 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Loongson GPIO Support
+ *
+ * Copyright (C) 2022 Loongson Technology Corporation Limited
+ */
+
+#include <linux/acpi.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/err.h>
+#include <linux/gpio/driver.h>
+#include <linux/platform_device.h>
+#include <linux/bitops.h>
+#include <asm/types.h>
+
+#define LOONGSON_GPIO_IN(x) (x->base + x->p_data->in_offset)
+#define LOONGSON_GPIO_OUT(x) (x->base + x->p_data->out_offset)
+#define LOONGSON_GPIO_OEN(x) (x->base + x->p_data->conf_offset)
+
+#define LOONGSON_GPIO_IN_BYTE(x, gpio) (x->base +\
+ x->p_data->in_offset + gpio)
+#define LOONGSON_GPIO_OUT_BYTE(x, gpio) (x->base +\
+ x->p_data->out_offset + gpio)
+#define LOONGSON_GPIO_OEN_BYTE(x, gpio) (x->base +\
+ x->p_data->conf_offset + gpio)
+
+enum loongson_gpio_mode {
+ BIT_CTRL_MODE,
+ BYTE_CTRL_MODE,
+};
+
+struct loongson_gpio_platform_data {
+ const char *label;
+ enum loongson_gpio_mode mode;
+ int conf_offset;
+ int out_offset;
+ int in_offset;
+};
+
+struct loongson_gpio_chip {
+ struct gpio_chip chip;
+ spinlock_t lock;
+ void __iomem *base;
+ u16 *gsi_idx_map;
+ u16 mapsize;
+ const struct loongson_gpio_platform_data *p_data;
+};
+
+static int loongson_gpio_request(
+ struct gpio_chip *chip, unsigned int pin)
+{
+ if (pin >= chip->ngpio)
+ return -EINVAL;
+
+ return 0;
+}
+
+static inline void __set_direction(struct loongson_gpio_chip *lgpio,
+ unsigned int pin, int input)
+{
+ u64 qval;
+ u8 bval;
+
+ if (lgpio->p_data->mode == BIT_CTRL_MODE) {
+ qval = readq(LOONGSON_GPIO_OEN(lgpio));
+ if (input)
+ qval |= 1ULL << pin;
+ else
+ qval &= ~(1ULL << pin);
+ writeq(qval, LOONGSON_GPIO_OEN(lgpio));
+ } else {
+ bval = input ? 1 : 0;
+ writeb(bval, LOONGSON_GPIO_OEN_BYTE(lgpio, pin));
+ }
+}
+
+static void __set_level(struct loongson_gpio_chip *lgpio, unsigned int pin,
+ int high)
+{
+ u64 qval;
+ u8 bval;
+
+ if (lgpio->p_data->mode == BIT_CTRL_MODE) {
+ qval = readq(LOONGSON_GPIO_OUT(lgpio));
+ if (high)
+ qval |= 1ULL << pin;
+ else
+ qval &= ~(1ULL << pin);
+ writeq(qval, LOONGSON_GPIO_OUT(lgpio));
+ } else {
+ bval = high ? 1 : 0;
+ writeb(bval, LOONGSON_GPIO_OUT_BYTE(lgpio, pin));
+ }
+}
+
+static int loongson_gpio_direction_input(
+ struct gpio_chip *chip, unsigned int pin)
+{
+ unsigned long flags;
+ struct loongson_gpio_chip *lgpio =
+ container_of(chip, struct loongson_gpio_chip, chip);
+
+ spin_lock_irqsave(&lgpio->lock, flags);
+ __set_direction(lgpio, pin, 1);
+ spin_unlock_irqrestore(&lgpio->lock, flags);
+
+ return 0;
+}
+
+static int loongson_gpio_direction_output(
+ struct gpio_chip *chip, unsigned int pin,
+ int value)
+{
+ struct loongson_gpio_chip *lgpio =
+ container_of(chip, struct loongson_gpio_chip, chip);
+ unsigned long flags;
+
+ spin_lock_irqsave(&lgpio->lock, flags);
+ __set_level(lgpio, pin, value);
+ __set_direction(lgpio, pin, 0);
+ spin_unlock_irqrestore(&lgpio->lock, flags);
+
+ return 0;
+}
+
+static int loongson_gpio_get(struct gpio_chip *chip, unsigned int pin)
+{
+ u64 qval;
+ u8 bval;
+ int val;
+
+ struct loongson_gpio_chip *lgpio =
+ container_of(chip, struct loongson_gpio_chip, chip);
+
+ if (lgpio->p_data->mode == BIT_CTRL_MODE) {
+ qval = readq(LOONGSON_GPIO_IN(lgpio));
+ val = (qval & (1ULL << pin)) != 0;
+ } else {
+ bval = readb(LOONGSON_GPIO_IN_BYTE(lgpio, pin));
+ val = bval & 1;
+ }
+
+ return val;
+}
+
+static void loongson_gpio_set(struct gpio_chip *chip, unsigned int pin,
+ int value)
+{
+ unsigned long flags;
+ struct loongson_gpio_chip *lgpio =
+ container_of(chip, struct loongson_gpio_chip, chip);
+
+ spin_lock_irqsave(&lgpio->lock, flags);
+ __set_level(lgpio, pin, value);
+ spin_unlock_irqrestore(&lgpio->lock, flags);
+}
+
+static int loongson_gpio_to_irq(
+ struct gpio_chip *chip, unsigned int offset)
+{
+ struct platform_device *pdev =
+ container_of(chip->parent, struct platform_device, dev);
+ struct loongson_gpio_chip *lgpio =
+ container_of(chip, struct loongson_gpio_chip, chip);
+
+ if (offset >= chip->ngpio)
+ return -EINVAL;
+
+ if ((lgpio->gsi_idx_map != NULL) && (offset < lgpio->mapsize))
+ offset = lgpio->gsi_idx_map[offset];
+ else
+ return -EINVAL;
+
+ return platform_get_irq(pdev, offset);
+}
+
+static int loongson_gpio_init(
+ struct device *dev, struct loongson_gpio_chip *lgpio,
+ struct device_node *np, void __iomem *base)
+{
+ lgpio->chip.request = loongson_gpio_request;
+ lgpio->chip.direction_input = loongson_gpio_direction_input;
+ lgpio->chip.get = loongson_gpio_get;
+ lgpio->chip.direction_output = loongson_gpio_direction_output;
+ lgpio->chip.set = loongson_gpio_set;
+ lgpio->chip.can_sleep = 0;
+ lgpio->chip.of_node = np;
+ lgpio->chip.parent = dev;
+ lgpio->chip.label = lgpio->p_data->label;
+ spin_lock_init(&lgpio->lock);
+ lgpio->base = (void __iomem *)base;
+ lgpio->chip.to_irq = loongson_gpio_to_irq;
+
+ devm_gpiochip_add_data(dev, &lgpio->chip, lgpio);
+
+ return 0;
+}
+
+static void loongson_gpio_get_props(struct platform_device *pdev,
+ struct loongson_gpio_chip *lgpio)
+{
+ int rval;
+ u32 ngpios;
+ struct device *dev = &pdev->dev;
+
+ device_property_read_u32(dev, "ngpios", &ngpios);
+ lgpio->chip.ngpio = ngpios;
+
+ rval = device_property_read_u16_array(dev, "gsi_idx_map", NULL, 0);
+ if (rval > 0) {
+ lgpio->gsi_idx_map =
+ devm_kmalloc_array(dev, rval, sizeof(*lgpio->gsi_idx_map),
+ GFP_KERNEL);
+ if (lgpio->gsi_idx_map) {
+ lgpio->mapsize = rval;
+ device_property_read_u16_array(dev, "gsi_idx_map",
+ lgpio->gsi_idx_map, lgpio->mapsize);
+ }
+ }
+}
+
+static int loongson_gpio_probe(struct platform_device *pdev)
+{
+ void __iomem *base;
+ struct loongson_gpio_chip *lgpio;
+ struct device_node *np = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+
+ lgpio = devm_kzalloc(dev, sizeof(*lgpio), GFP_KERNEL);
+ if (!lgpio)
+ return -ENOMEM;
+
+ loongson_gpio_get_props(pdev, lgpio);
+
+ lgpio->p_data = device_get_match_data(&pdev->dev);
+
+ base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ platform_set_drvdata(pdev, lgpio);
+
+ loongson_gpio_init(dev, lgpio, np, base);
+
+ return 0;
+}
+
+static const struct loongson_gpio_platform_data loongson_gpio_pdata0 = {
+ .label = "ls2k_gpio",
+ .mode = BIT_CTRL_MODE,
+ .conf_offset = 0x0,
+ .in_offset = 0x10,
+ .out_offset = 0x20,
+};
+
+static const struct loongson_gpio_platform_data loongson_gpio_pdata1 = {
+ .label = "ls7a_gpio",
+ .mode = BYTE_CTRL_MODE,
+ .conf_offset = 0x800,
+ .in_offset = 0x900,
+ .out_offset = 0xa00,
+};
+
+static const struct of_device_id loongson_gpio_of_match[] = {
+ {
+ .compatible = "loongson,ls2k-gpio",
+ .data = &loongson_gpio_pdata0,
+ },
+ {
+ .compatible = "loongson,ls7a-gpio",
+ .data = &loongson_gpio_pdata1,
+ },
+ {}
+};
+MODULE_DEVICE_TABLE(of, loongson_gpio_of_match);
+
+static const struct acpi_device_id loongson_gpio_acpi_match[] = {
+ {
+ .id = "LOON0002",
+ .driver_data = (kernel_ulong_t)&loongson_gpio_pdata1,
+ },
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match);
+
+static struct platform_driver loongson_gpio_driver = {
+ .driver = {
+ .name = "loongson-gpio",
+ .owner = THIS_MODULE,
+ .of_match_table = loongson_gpio_of_match,
+ .acpi_match_table = loongson_gpio_acpi_match,
+ },
+ .probe = loongson_gpio_probe,
+};
+
+static int __init loongson_gpio_setup(void)
+{
+ return platform_driver_register(&loongson_gpio_driver);
+}
+postcore_initcall(loongson_gpio_setup);
+
+MODULE_DESCRIPTION("Loongson gpio driver");
+MODULE_LICENSE("GPL");
--
2.33.0
