Dne četrtek, 10. november 2022 ob 01:55:07 CET je Andre Przywara napisal(a): > As many other Allwinner SoCs from the last years, the first USB host > controller pair in the Allwinner H3 and H5 chips share a USB PHY with > the MUSB OTG controller. This is probably the reason why we didn't have > a "phys" property in those host controller nodes. > This works fine as long as the MUSB controller driver is loaded, as this > takes care of the proper PHY setup, including the muxing between MUSB > and the HCI. > > However this requires the MUSB driver to be enabled and loaded, and also > upsets U-Boot, which cannot use a HCI port without a "phys" property. > > Similar to what we did in commit cc72570747e4 ("arm64: dts: allwinner: > A64: properly connect USB PHY to port 0"), add the "phys" property to > the OHCI0 and EHCI0 DT nodes in the shared H3/H5 .dtsi file. > > This is not only the proper description of the hardware, but also avoids > a nasty error message in U-Boot triggered by a recent patch. (The port > never worked in host mode, but the error was suppressed due to a bug.) > > When using the MUSB port in OTG mode, this also fixes host mode > switching, so people can use OTG adapters to connect a USB device to > port 0. > > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Acked-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx> Best regards, Jernej