On 16/11/2022 17:27, Bryan O'Donoghue wrote:
The number of available ports is SoC specific so we should define it in the SoC dtsi. For the case of the sdm845 that is 4 CSI PHYs => four ports. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> Konrad
arch/arm64/boot/dts/qcom/sdm845.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1a257f6728874..29e6d64e74c97 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4368,6 +4368,22 @@ camss: camss@a00000 { ports { #address-cells = <1>; #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + + port@3 { + reg = <3>; + }; }; };