Re: [PATCH v2] dt-bindings: spi: convert Freescale DSPI to dt-schema

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On 11/11/2022 23:46, Vladimir Oltean wrote:
> From: Kuldeep Singh <kuldeep.singh@xxxxxxx>
> 
> Convert the Freescale DSPI binding to DT schema format.
> 
> Signed-off-by: Kuldeep Singh <kuldeep.singh@xxxxxxx>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@xxxxxxx>
> ---
> v1 (from more than 1 year ago) at:
> https://patchwork.kernel.org/project/spi-devel-general/patch/20210315121518.3710171-1-kuldeep.singh@xxxxxxx/
> 
>  .../fsl,spi-fsl-dspi-peripheral-props.yaml    |  28 +++++
>  .../bindings/spi/fsl,spi-fsl-dspi.yaml        | 118 ++++++++++++++++++
>  .../devicetree/bindings/spi/spi-fsl-dspi.txt  |  65 ----------
>  .../bindings/spi/spi-peripheral-props.yaml    |   1 +
>  MAINTAINERS                                   |   3 +-
>  5 files changed, 149 insertions(+), 66 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi-peripheral-props.yaml
>  create mode 100644 Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml
>  delete mode 100644 Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
> 
> diff --git a/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi-peripheral-props.yaml
> new file mode 100644
> index 000000000000..d15f77c040d1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi-peripheral-props.yaml
> @@ -0,0 +1,28 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,spi-fsl-dspi-peripheral-props.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Peripheral-specific properties for Freescale DSPI controller
> +
> +maintainers:
> +  - Vladimir Oltean <olteanv@xxxxxxxxx>
> +
> +description:
> +  See spi-peripheral-props.yaml for more info.
> +
> +properties:
> +  fsl,spi-cs-sck-delay:
> +    description:
> +      Delay in nanoseconds between activating chip select and the start of
> +      clock signal, at the start of a transfer.
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +
> +  fsl,spi-sck-cs-delay:
> +    description:
> +      Delay in nanoseconds between stopping the clock signal and
> +      deactivating chip select, at the end of a transfer.
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +
> +additionalProperties: true
> diff --git a/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml
> new file mode 100644
> index 000000000000..8a790c0ed95f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml
> @@ -0,0 +1,118 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,spi-fsl-dspi.yaml#

Why second "fsl" in file name? It does not patch compatibles and
duplicates the vendor. We do not have compatibles "nxp,imx6-nxp".

> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale DSPI Controller
> +
> +maintainers:
> +  - Vladimir Oltean <olteanv@xxxxxxxxx>
> +
> +allOf:
> +  - $ref: "spi-controller.yaml#"

Drop quotes.

> +
> +properties:
> +  compatible:
> +    description:
> +      Some integrations can have a single compatible string containing their
> +      SoC name (LS1012A, LS1021A, ...). Others require their SoC compatible
> +      string, plus a fallback compatible string (either on LS1021A or on
> +      LS2085A).

Why? The fsl,ls1012a-dspi device is either compatible with
fsl,ls1021a-v1.0-dspi or not. It cannot be both - compatible and not
compatible.


> +    oneOf:
> +      - enum:
> +          - fsl,ls1012a-dspi
> +          - fsl,ls1021a-v1.0-dspi
> +          - fsl,ls1028a-dspi
> +          - fsl,ls2085a-dspi
> +          - fsl,lx2160a-dspi
> +          - fsl,vf610-dspi
> +      - items:
> +          - enum:
> +              - fsl,ls1012a-dspi
> +              - fsl,ls1028a-dspi
> +              - fsl,ls1043a-dspi
> +              - fsl,ls1046a-dspi
> +              - fsl,ls1088a-dspi
> +          - const: fsl,ls1021a-v1.0-dspi
> +      - items:
> +          - enum:
> +              - fsl,ls2080a-dspi
> +              - fsl,lx2160a-dspi
> +          - const: fsl,ls2085a-dspi
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: dspi
> +
> +  dmas:
> +    maxItems: 2
> +
> +  dma-names:
> +    items:
> +      - const: tx
> +      - const: rx
> +
> +  spi-num-chipselects:

Would be nice to deprecated it in separate patches. There is num-cs
property.

> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: Number of available native Chip Select signals
> +
> +  bus-num:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description: SoC-specific identifier for the SPI controller
> +
> +  little-endian: true
> +  big-endian: true
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - spi-num-chipselects
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        spi@2100000 {
> +            compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            reg = <0x0 0x2100000 0x0 0x10000>;

reg by convention is a second property.

> +            interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +            clock-names = "dspi";
> +            clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>;
> +            dmas = <&edma0 0 62>, <&edma0 0 60>;
> +            dma-names = "tx", "rx";
> +            pinctrl-names = "default";
> +            pinctrl-0 = <&pinctrl_dspi0_1>;
> +            spi-num-chipselects = <4>;
> +            little-endian;
> +
> +            flash@0 {
> +                compatible = "jedec,spi-nor";
> +                spi-max-frequency = <10000000>;
> +                fsl,spi-cs-sck-delay = <100>;
> +                fsl,spi-sck-cs-delay = <100>;
> +                reg = <0>;

Ditto.

> +            };
> +        };
> +    };
> diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
> deleted file mode 100644

(...)

> diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> index dca677f9e1b9..a475e757f8da 100644
> --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> @@ -101,6 +101,7 @@ properties:
>  # The controller specific properties go here.
>  allOf:
>    - $ref: cdns,qspi-nor-peripheral-props.yaml#
> +  - $ref: fsl,spi-fsl-dspi-peripheral-props.yaml#
>    - $ref: samsung,spi-peripheral-props.yaml#
>    - $ref: nvidia,tegra210-quad-peripheral-props.yaml#
>  
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c242098a34f9..c75ae49c85b5 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8160,7 +8160,8 @@ FREESCALE DSPI DRIVER
>  M:	Vladimir Oltean <olteanv@xxxxxxxxx>
>  L:	linux-spi@xxxxxxxxxxxxxxx
>  S:	Maintained
> -F:	Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
> +F:	Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml

Instead: Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi*

Best regards,
Krzysztof




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