Re: [PATCH 2/3] arm64: dts: qcom: sm8450: add Soundwire and LPASS

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On 15/11/2022 11:15, Krzysztof Kozlowski wrote:
On 14/11/2022 16:37, Konrad Dybcio wrote:

On 14/11/2022 16:21, Krzysztof Kozlowski wrote:
From: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx>

Add Soundwire controllers, Low Power Audio SubSystem (LPASS) devices and
LPASS pin controller.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx>
Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
   arch/arm64/boot/dts/qcom/sm8450.dtsi | 295 +++++++++++++++++++++++++++
   1 file changed, 295 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 4b0a1eee8bd9..c99740591467 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -15,6 +15,7 @@
   #include <dt-bindings/interconnect/qcom,sm8450.h>
   #include <dt-bindings/soc/qcom,gpr.h>
   #include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
   #include <dt-bindings/thermal/thermal.h>
/ {
@@ -2097,6 +2098,212 @@ compute-cb@3 {
   			};
   		};
+ wsa2macro: codec@31e0000 {
+			compatible = "qcom,sm8450-lpass-wsa-macro";
+			reg = <0 0x031e0000 0 0x1000>;
The sorting will be off, as adsp and cdsp have been mistakenly put in
the wrong place (notice adsp @ 32300000 is actually at an address
that's 8 hex digits long, but the reg addr is padded to 9 hex digits..).

I don't get it. This has address:
31e0000
ADSP has
30000000

so why sorting is odd?
It's gonna be fine, you're right, I can't read properly...

Konrad

Could you submit a fix for that as well?

For 9 digits, sure, but this is independent issue.


+			clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				 <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				 <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				 <&vamacro>;
+			clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
+			assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+					  <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK  LPASS_CLK_ATTRIBUTE_COUPLE_NO>;

Remove the duplicated space before LPASS_CLK_ATTRIBUTE_COUPLE_NO.

Ack.


Best regards,
Krzysztof




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