Some SMMUs require that a vote is held on as much as 3 separate PDs (hello Qualcomm). Allow it in bindings. Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> --- Changes since v1: - Add minItems Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 9066e6df1ba1..82bc696de662 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -159,7 +159,8 @@ properties: through the TCU's programming interface. power-domains: - maxItems: 1 + minItems: 0 + maxItems: 3 nvidia,memory-controller: description: | -- 2.38.1