On 10/11/2022 15:42, Uwe Kleine-König wrote:
Hello Ben,
On Thu, Oct 20, 2022 at 04:16:10PM +0100, Ben Dooks wrote:
As noted, the clock-rate when not a nice multiple of ns is probably
going to end up with inacurate caculations, as well as on a non pci
system the rate may change (although we've not put a clock rate
change notifier in this code yet) so we also add some quick checks
of the rate when we do any calculations with it.
Signed-off-by; Ben Dooks <ben.dooks@xxxxxxxxxx>
Reported-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
---
drivers/pwm/pwm-dwc-of.c | 2 +-
drivers/pwm/pwm-dwc.c | 29 ++++++++++++++++++++---------
drivers/pwm/pwm-dwc.h | 2 +-
3 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/drivers/pwm/pwm-dwc-of.c b/drivers/pwm/pwm-dwc-of.c
index c5b4351cc7b0..5f7f066859d4 100644
--- a/drivers/pwm/pwm-dwc-of.c
+++ b/drivers/pwm/pwm-dwc-of.c
@@ -50,7 +50,7 @@ static int dwc_pwm_plat_probe(struct platform_device *pdev)
return dev_err_probe(dev, PTR_ERR(dwc->clk),
"failed to get timer clock\n");
- dwc->clk_ns = NSEC_PER_SEC / clk_get_rate(dwc->clk);
+ dwc->clk_rate = clk_get_rate(dwc->clk);
Given that clk_ns is introduced only in this series, I suggest to make
it right from the start.
I was trying to keep the splitting of the driver and the clock changes
separate to make any possible bisection easier.
--
Ben
