Move the sleep_clk to make sure the gcc device node follows the schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index d32f08df743d..efb01fefe9c7 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -720,13 +720,13 @@ gcc: clock-controller@100000 {
#reset-cells = <1>;
#power-domain-cells = <1>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&sleep_clk>,
<&pcie0_lane>,
- <&pcie1_lane>,
- <&sleep_clk>;
+ <&pcie1_lane>;
clock-names = "bi_tcxo",
+ "sleep_clk",
"pcie_0_pipe_clk",
- "pcie_1_pipe_clk",
- "sleep_clk";
+ "pcie_1_pipe_clk";
};
gpi_dma2: dma-controller@800000 {
--
2.35.1
