On Wed, Nov 09, 2022 at 11:55:24AM -0800, Palmer Dabbelt wrote: > On Fri, 28 Oct 2022 09:59:14 PDT (-0700), prabhakar.csengg@xxxxxxxxx wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > Lad Prabhakar (7): > > dt-bindings: riscv: Sort the CPU core list alphabetically > > dt-bindings: riscv: Add Andes AX45MP core to the list > > riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option > > riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC > > riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK > > MAINTAINERS: Add entry for Renesas RISC-V > > riscv: configs: defconfig: Enable Renesas RZ/Five SoC > Geert was mentioning taking these though one of his trees, that works for me > so > > Acked-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx> > > Happy to do a shared tag or whatever, but I think we can just skip that > here. The only conflicts would be defconfig and Kconfig.socs, but I don't > think anything big is in the works for either -- unless Conor was planning > on re-spinning that Kconfig.socs rework? Uh, nah. I've got a wee bit (the removal of selects) that is "ready" but there's zero urgency so it can wait for after v6.2-rc1. I don't think it'd conflict anyway. The rest of it I need to sort out a v1 of, but I've been distracted. Should be safe to take the defconfig & Kconfig.socs stuff in terms of me doing anything. Geert, would you be able to apply the first two patches on top of v6.1-rc1 just in case, as you mentioned previously, it needs to become part of a shared branch? Seems unlikely at this point in the cycle though. Thanks, Conor.
