Hi maintainer,
please help me merge it to upstream.
thanks,
Yinbo.
在 2022/11/3 下午1:00, Yinbo Zhu 写道:
This file defines all Loongson-2 SoC clock indexes, it should be
included in the device tree in which there's device using the
clocks.
Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
Change in v9:
1. Add all history changelog infomation.
Change in v8:
1. No change but this series patch has a change.
Change in v7:
1. No change but this series patch has a change.
Change in v6:
1. Replace string LOONGSON2 with LOONGSON-2 in MAINTAINERS.
Change in v5:
1. Replace loongson2/Loongson2 with loongson-2/Loongson-2.
2. Replace soc with SoC.
Change in v4:
1. No change but this series patch has a change.
Change in v3:
1. Add the review information.
Change in v2:
1. Make filename matching the compatible.
2. Drop weird indentation after define.
3. Add dual license.
4. Use subject prefixes matching the subsystem.
MAINTAINERS | 6 ++++
include/dt-bindings/clock/loongson,ls2k-clk.h | 29 +++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 include/dt-bindings/clock/loongson,ls2k-clk.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 3aff8b8723b1..d5d1f2b9fcfd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12018,6 +12018,12 @@ S: Maintained
F: Documentation/devicetree/bindings/thermal/loongson,ls2k-thermal.yaml
F: drivers/thermal/loongson2_thermal.c
+LOONGSON-2 SOC SERIES CLOCK DRIVER
+M: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
+L: linux-clk@xxxxxxxxxxxxxxx
+S: Maintained
+F: include/dt-bindings/clock/loongson,ls2k-clk.h
+
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@xxxxxxxxxxxx>
M: Sreekanth Reddy <sreekanth.reddy@xxxxxxxxxxxx>
diff --git a/include/dt-bindings/clock/loongson,ls2k-clk.h b/include/dt-bindings/clock/loongson,ls2k-clk.h
new file mode 100644
index 000000000000..db1e27e792ff
--- /dev/null
+++ b/include/dt-bindings/clock/loongson,ls2k-clk.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Author: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
+ * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H
+#define __DT_BINDINGS_CLOCK_LOONGSON2_H
+
+#define LOONGSON2_REF_100M 0
+#define LOONGSON2_NODE_PLL 1
+#define LOONGSON2_DDR_PLL 2
+#define LOONGSON2_DC_PLL 3
+#define LOONGSON2_PIX0_PLL 4
+#define LOONGSON2_PIX1_PLL 5
+#define LOONGSON2_NODE_CLK 6
+#define LOONGSON2_HDA_CLK 7
+#define LOONGSON2_GPU_CLK 8
+#define LOONGSON2_DDR_CLK 9
+#define LOONGSON2_GMAC_CLK 10
+#define LOONGSON2_DC_CLK 11
+#define LOONGSON2_APB_CLK 12
+#define LOONGSON2_USB_CLK 13
+#define LOONGSON2_SATA_CLK 14
+#define LOONGSON2_PIX0_CLK 15
+#define LOONGSON2_PIX1_CLK 16
+#define LOONGSON2_CLK_END 17
+
+#endif
