On 08/11/2022 04:50, Thippeswamy Havalige wrote: > Convert to YAML dtschemas of Xilinx AXI PCIe Root Port Bridge > dt binding. > > Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@xxxxxxx> > --- > Dropped additional blank line before sob. This is a friendly reminder during the review process. It looks like you received a tag and forgot to add it. If you do not know the process, here is a short explanation: Please add Acked-by/Reviewed-by/Tested-by tags when posting new versions. However, there's no need to repost patches *only* to add the tags. The upstream maintainer will do that for acks received on the version they apply. https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540 If a tag was not added on purpose, please state why and what changed. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
