On Sun, Nov 6, 2022 at 11:15 AM Chen-Yu Tsai <wens@xxxxxxxxxx> wrote:
>
> From: Chen-Yu Tsai <wens@xxxxxxxx>
>
> At least one implementation, Linux, requires "dma-names" properties
> be used together with "dmas" to describe DMA resources. These are
> currently missing, causing DMA to not be used for UARTs.
>
> Add "dma-names" to the UART device nodes.
>
> Fixes: a3adc0b9071d ("arm64: dts: rockchip: add core dtsi for RK3568 SoC")
> Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>
Enabling dma globally can cause some interesting issues, have you
tested this fully?
> ---
> arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index 5706c3e24f0a..5cd55487c20e 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -447,6 +447,7 @@ uart0: serial@fdd50000 {
> clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 0>, <&dmac0 1>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1326,6 +1327,7 @@ uart1: serial@fe650000 {
> clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 2>, <&dmac0 3>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart1m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1340,6 +1342,7 @@ uart2: serial@fe660000 {
> clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 4>, <&dmac0 5>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart2m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1354,6 +1357,7 @@ uart3: serial@fe670000 {
> clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 6>, <&dmac0 7>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart3m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1368,6 +1372,7 @@ uart4: serial@fe680000 {
> clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 8>, <&dmac0 9>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart4m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1382,6 +1387,7 @@ uart5: serial@fe690000 {
> clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 10>, <&dmac0 11>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart5m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1396,6 +1402,7 @@ uart6: serial@fe6a0000 {
> clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 12>, <&dmac0 13>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart6m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1410,6 +1417,7 @@ uart7: serial@fe6b0000 {
> clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 14>, <&dmac0 15>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart7m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1424,6 +1432,7 @@ uart8: serial@fe6c0000 {
> clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 16>, <&dmac0 17>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart8m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> @@ -1438,6 +1447,7 @@ uart9: serial@fe6d0000 {
> clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>;
> clock-names = "baudclk", "apb_pclk";
> dmas = <&dmac0 18>, <&dmac0 19>;
> + dma-names = "tx", "rx";
> pinctrl-0 = <&uart9m0_xfer>;
> pinctrl-names = "default";
> reg-io-width = <4>;
> --
> 2.34.1
>
>
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