[PATCH v2 1/3] dt-bindings: imx6q-pcie: Handle various clock configurations

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The i.MX SoCs have various clock configurations routed into the PCIe IP,
the list of clock is below. Document all those configurations in the DT
binding document.

All SoCs: pcie, pcie_bus
6QDL, 7D: + pcie_phy
6SX:      + pcie_phy          pcie_inbound_axi
8MQ:      + pcie_phy pcie_aux
8MM, 8MP: +          pcie_aux

Acked-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
Signed-off-by: Marek Vasut <marex@xxxxxxx>
---
Cc: Fabio Estevam <festevam@xxxxxxxxx>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Cc: Richard Zhu <hongxing.zhu@xxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: NXP Linux Team <linux-imx@xxxxxxx>
To: devicetree@xxxxxxxxxxxxxxx
---
V2: - Add AB from Alex
---
 .../bindings/pci/fsl,imx6q-pcie.yaml          | 74 +++++++++++++++++--
 1 file changed, 69 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 376e739bcad40..1cfea8ca72576 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -14,9 +14,6 @@ description: |+
   This PCIe host controller is based on the Synopsys DesignWare PCIe IP
   and thus inherits all the common properties defined in snps,dw-pcie.yaml.
 
-allOf:
-  - $ref: /schemas/pci/snps,dw-pcie.yaml#
-
 properties:
   compatible:
     enum:
@@ -60,8 +57,8 @@ properties:
     items:
       - const: pcie
       - const: pcie_bus
-      - const: pcie_phy
-      - const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie
+      - enum: [pcie_phy, pcie_aux]
+      - enum: [pcie_inbound_axi, pcie_aux]
 
   num-lanes:
     const: 1
@@ -177,6 +174,73 @@ required:
 
 unevaluatedProperties: false
 
+allOf:
+  - $ref: /schemas/pci/snps,dw-pcie.yaml#
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - fsl,imx6sx-pcie
+              - fsl,imx8mq-pcie
+    then:
+      properties:
+        clocks:
+          maxItems: 4
+        clock-names:
+          maxItems: 4
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx6sx-pcie
+    then:
+      properties:
+        clock-names:
+          items:
+            - const: pcie
+            - const: pcie_bus
+            - const: pcie_phy
+            - const: pcie_inbound_axi
+    else:
+      if:
+        properties:
+          compatible:
+            contains:
+              const: fsl,imx8mq-pcie
+      then:
+        properties:
+          clock-names:
+            items:
+              - const: pcie
+              - const: pcie_bus
+              - const: pcie_phy
+              - const: pcie_aux
+      else:
+        if:
+          properties:
+            compatible:
+              contains:
+                enum:
+                  - fsl,imx8mm-pcie
+                  - fsl,imx8mp-pcie
+        then:
+          properties:
+            clock-names:
+              items:
+                - const: pcie
+                - const: pcie_bus
+                - const: pcie_aux
+        else:
+          properties:
+            clock-names:
+              items:
+                - const: pcie
+                - const: pcie_bus
+                - const: pcie_phy
+
 examples:
   - |
     #include <dt-bindings/clock/imx6qdl-clock.h>
-- 
2.35.1




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