On 11/3/22 04:24, Rob Herring wrote:
On Wed, 02 Nov 2022 22:57:27 +0100, Marek Vasut wrote:
The i.MX SoCs have various clock configurations routed into the PCIe IP,
the list of clock is below. Document all those configurations in the DT
binding document.
All SoCs: pcie, pcie_bus
6QDL, 7D: + pcie_phy
6SX: + pcie_phy pcie_inbound_axi
8MQ: + pcie_phy pcie_aux
8MM, 8MP: + pcie_aux
Signed-off-by: Marek Vasut <marex@xxxxxxx>
---
Cc: Fabio Estevam <festevam@xxxxxxxxx>
Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Cc: Richard Zhu <hongxing.zhu@xxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: NXP Linux Team <linux-imx@xxxxxxx>
To: devicetree@xxxxxxxxxxxxxxx
---
.../bindings/pci/fsl,imx6q-pcie.yaml | 74 +++++++++++++++++--
1 file changed, 69 insertions(+), 5 deletions(-)
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
pcie@1ffc000: Unevaluated properties are not allowed ('disable-gpio' was unexpected)
arch/arm/boot/dts/imx6dl-emcon-avari.dtb
arch/arm/boot/dts/imx6q-emcon-avari.dtb
This part is unrelated to this patch.
pcie@33800000: clock-names:1: 'pcie_bus' was expected
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
This and all the clock related goop should be solved by this series:
[PATCH 1/3] arm64: dts: imx8mm: Deduplicate PCIe clock-names property
Once that lands, this could land too without any errors anymore.
[...]
