The LED_X_POLARITY bits in the LEDCR2 register are default 1, meaning the LEDs are driven as active high. On some boards, the LEDs are active low, so implement support for clearing those bits when the corresponding ti,ledX-active-low DT property is present. Signed-off-by: Rasmus Villemoes <linux@xxxxxxxxxxxxxxxxxx> --- drivers/net/phy/dp83867.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 417527f8bbf5..8e8078ef2881 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -26,6 +26,7 @@ #define MII_DP83867_MICR 0x12 #define MII_DP83867_ISR 0x13 #define DP83867_CFG2 0x14 +#define DP83867_LEDCR2 0x19 #define DP83867_CFG3 0x1e #define DP83867_CTRL 0x1f @@ -140,6 +141,11 @@ #define DP83867_DOWNSHIFT_8_COUNT 8 #define DP83867_SGMII_AUTONEG_EN BIT(7) +/* LEDCR2 bits */ +#define DP83867_LEDCR2_LED_0_POLARITY BIT(2) +#define DP83867_LEDCR2_LED_1_POLARITY BIT(6) +#define DP83867_LEDCR2_LED_2_POLARITY BIT(10) + /* CFG3 bits */ #define DP83867_CFG3_INT_OE BIT(7) #define DP83867_CFG3_ROBUST_AUTO_MDIX BIT(9) @@ -167,6 +173,9 @@ struct dp83867_private { bool set_clk_output; u32 clk_output_sel; bool sgmii_ref_clk_en; + bool led0_active_low; + bool led1_active_low; + bool led2_active_low; }; static int dp83867_ack_interrupt(struct phy_device *phydev) @@ -658,6 +667,13 @@ static int dp83867_of_init(struct phy_device *phydev) return -EINVAL; } + dp83867->led0_active_low = of_property_read_bool(of_node, + "ti,led0-active-low"); + dp83867->led1_active_low = of_property_read_bool(of_node, + "ti,led1-active-low"); + dp83867->led2_active_low = of_property_read_bool(of_node, + "ti,led2-active-low"); + return 0; } #else @@ -890,6 +906,22 @@ static int dp83867_config_init(struct phy_device *phydev) mask, val); } + if (dp83867->led0_active_low) { + ret = phy_modify(phydev, DP83867_LEDCR2, DP83867_LEDCR2_LED_0_POLARITY, 0); + if (ret) + return ret; + } + if (dp83867->led1_active_low) { + ret = phy_modify(phydev, DP83867_LEDCR2, DP83867_LEDCR2_LED_1_POLARITY, 0); + if (ret) + return ret; + } + if (dp83867->led2_active_low) { + ret = phy_modify(phydev, DP83867_LEDCR2, DP83867_LEDCR2_LED_2_POLARITY, 0); + if (ret) + return ret; + } + return 0; } -- 2.37.2