On Wed, Sep 14, 2022 at 11:33:06AM +0530, Sibi Sankar wrote: > Add support for CPUSS Control Processor (CPUCP) mailbox controller, > this driver enables communication between AP and CPUCP by acting as > a doorbell between them. > > Signed-off-by: Gaurav Kohli <gkohli@xxxxxxxxxxxxxx> > [sibis: moved to mailbox and misc. cleanups] > Signed-off-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx> > --- [...] > + > + ret = devm_request_irq(&pdev->dev, cpucp->irq, qcom_cpucp_mbox_irq_fn, > + IRQF_TRIGGER_HIGH | IRQF_NO_SUSPEND, "qcom_cpucp_mbox", cpucp); 1. Do you plan to use this mailbox during noirq phase of system suspend ? If not why do you have IRQF_NO_SUSPEND ? If yes, how will it be used ? 2. Why are you setting IRQF_TRIGGER_HIGH here ? Won't platform_get_irq() take care of that ? Otherwise how would you use this driver on the platform that need say IRQF_TRIGGER_LOW ? -- Regards, Sudeep
