On Wed, 2022-11-02 at 10:13 +0100, AngeloGioacchino Del Regno wrote: > Il 01/11/22 07:11, Tinghan Shen ha scritto: > > Add the default clock sources used by mt8186 dsp. > > > > Signed-off-by: Tinghan Shen <tinghan.shen@xxxxxxxxxxxx> > > --- > > .../devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml | 12 +++++++++--- > > 1 file changed, 9 insertions(+), 3 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml > > index 3e63f79890b4..4cc0634c876b 100644 > > --- a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml > > +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml > > @@ -35,11 +35,15 @@ properties: > > items: > > - description: mux for audio dsp clock > > - description: mux for audio dsp local bus > > + - description: default clock source for dsp local bus > > + - description: default clock source for dsp core > > > > clock-names: > > items: > > - const: audiodsp > > - const: adsp_bus > > + - const: mainpll_d2_d2 > > + - const: clk26m > > > > power-domains: > > maxItems: 1 > > @@ -82,9 +86,11 @@ examples: > > <0x1068f000 0x1000>; > > reg-names = "cfg", "sram", "sec", "bus"; > > clocks = <&topckgen CLK_TOP_AUDIODSP>, > > - <&topckgen CLK_TOP_ADSP_BUS>; > > - clock-names = "audiodsp", > > - "adsp_bus"; > > + <&topckgen CLK_TOP_ADSP_BUS>, > > + <&topckgen CLK_TOP_MAINPLL_D2_D2>, > > + <&clk26m>; > > + clock-names = "audiodsp", "adsp_bus", > > + "mainpll_d2_d2", "clk26m"; > > You are assigning those clocks just to be able to call clk_set_parent() in > the DSP mt8186-clk driver... and that's not necessary, nor it is the best > way of doing what you're trying to. > > In reality, you don't need to add new clocks and you don't need to manage > that into the driver, as you can simply assign clock parents in devicetree > ... like: > > assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>, <&topckgen CLK_TOP_ADSP_BUS>; > assigned-clock-parents = <&clk26m>, <&topckgen CLK_TOP_MAINPLL_D2_D2>; > > without any clk_set_parent() call in the driver. > > When the driver will call clk_prepare_enable() for top_audiodsp and/or for > top_adsp_bus, the assigned parents' refcount will also be increased (and > if the parent clock is not enabled, the clk framework will enable it). > > Regards, > Angelo > Hi Angelo, Thank you very much! I will abandon this series. Thank you! -- Best regards, TingHan
