Il 28/10/22 11:43, Tinghan Shen ha scritto:
From: Jianjun Wang <jianjun.wang@xxxxxxxxxxxx>
In order to support mt8195 pcie node, update the yaml to support new
properties of iommu and power-domain, and update the reset-names
property to allow only one 'mac' name.
Signed-off-by: Jianjun Wang <jianjun.wang@xxxxxxxxxxxx>
Signed-off-by: TingHan Shen <tinghan.shen@xxxxxxxxxxxx>
---
.../bindings/pci/mediatek-pcie-gen3.yaml | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index c00be39af64e..a9013c10131a 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -70,14 +70,21 @@ properties:
minItems: 1
maxItems: 8
+ iommu-map:
+ maxItems: 1
+
+ iommu-map-mask:
+ const: 0
+
resets:
minItems: 1
maxItems: 2
reset-names:
- minItems: 1
- items:
- - const: phy
+ oneOf:
+ - items:
+ - const: phy
+ - const: mac
- const: mac
Sorry, this looks a bit messy.
I can propose two solutions, either:
reset-names:
minItems: 1
items:
- const: mac
- const: phy
... and change the order in mt8192.dtsi;
otherwise, something like
allOf:
- if:
properties:
compatible:
contains:
- const: mediatek,mt8195-pcie
... invert reset-names
I think that the first solution makes a bit more sense though, as the
PHY reset may be moved in a PCIE-PHY specific driver instead of being
managed here in pci-mediatek-gen3.
Regards,
Angelo
