Re: [PATCH v8 0/2] gpmc wait pin additions

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On 28/10/2022 07:56, Roger Quadros wrote:
> Hello Benedikt,
> 
> On 21/10/2022 11:16, B. Niedermayr wrote:
>> From: Benedikt Niedermayr <benedikt.niedermayr@xxxxxxxxxxx>
>>
>> Currently it is not possible to configure the WAIT0PINPOLARITY and
>> WAIT1PINPOLARITY bits of the GPMC_CONFIG register directly via
>> device tree properties.
>>
>> It is also not possible to use the same wait-pin for different
>> cs-regions.
>>
>> While the current implementation may fullfill most usecases, it may not
>> be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where
>> more complex interfacing options where possible.
>>
>> For example interfacing an ASIC which offers multiple cs-regions but
>> only one waitpin the current driver and dt-bindings are not sufficient.
>>
>> While using the same waitpin for different cs-regions worked for older
>> kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with
>> newer kernels (>5.10).
> 
> This series does not apply on v6.0 nor on v6.1-rc1.
> Could you please rebase on v6.1-rc1 and send? Thanks!

I am still kind of expecting your review of these. Shall I not?

Best regards,
Krzysztof




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