From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Hi All,
This patch series aims to split up the RZ/G2UL SoC DTSI into common parts
so that this can be shared with the RZ/Five SoC.
Implementation is based on the discussion [0] where I have used option#2.
The Renesas RZ/G2UL (ARM64) and RZ/Five (RISC-V) have almost the same
identical blocks to avoid duplication a base SoC dtsi (r9a07g043.dtsi) is
created which will be used by the RZ/G2UL (r9a07g043u.dtsi) and RZ/Five
(r9a07g043f.dtsi)
r9a07g043f.dtsi (RZ/Five SoC DTSI) will look something like below:
#include <dt-bindings/interrupt-controller/irq.h>
#define SOC_PERIPHERAL_IRQ(nr) (nr + 32)
#include <arm64/renesas/r9a07g043.dtsi>
/ {
...
...
};
Although patch#2 can be merged into patch#1 just wanted to keep them separated
for easier review.
Changes for v2:
- Fixed review comments pointed by Geert
- Changed the SOC_PERIPHERAL_IRQ() macro
RFC-> RESEND RFC
* Patches rebased on top of renesas-arm-dt-for-v6.2 [1].
RESEND:
- https://patchwork.kernel.org/project/linux-renesas-soc/cover/20221017091201.199457-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/
RFC:
- https://patchwork.kernel.org/project/linux-renesas-soc/cover/20220929172356.301342-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/
[0] https://lore.kernel.org/linux-arm-kernel/Yyt8s5+pyoysVNeC@spud/T/
[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-arm-dt-for-v6.2
Cheers,
Prabhakar
Lad Prabhakar (2):
arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro
to specify interrupt property
arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 347 ++++++++----------
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 72 ++++
.../boot/dts/renesas/r9a07g043u11-smarc.dts | 2 +-
3 files changed, 220 insertions(+), 201 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
--
2.25.1
