JZ4750 and JZ4755 have an extra clock divisor in CGU called CPCCR.ECS. It needs to be handled properly in the early console driver. V1 diff: - splitted into separate patchset - code refactored to avoid peek in CGU register - Krzysztof's ack picked Siarhei Volkau (2): dt-bindings: serial: ingenic: Add support for the JZ4750/55 SoCs serial: 8250/ingenic: Add support for the JZ4750/JZ4755 .../bindings/serial/ingenic,uart.yaml | 4 ++ drivers/tty/serial/8250/8250_ingenic.c | 50 ++++++++++++++++--- 2 files changed, 47 insertions(+), 7 deletions(-) -- 2.36.1
