On 22/10/2022 10:43, Nicolas Frattaroli wrote:
[ ... ]
What is TOP and CENTER ?
There are 4 Bigs on this platform but two sensors ?
As far as I know, the four big cores in the SoC are arranged in two
clusters of two cores each, so one temperature sensor for each
cluster. As far as I can tell each CPU in a cluster shares its voltage
with its partner CPU core in its cluster.
Ok, I found some more details on the datasheet, page 7-8.
So it is a big "Cluster" with the 4 Big cores. They share the same cache.
There is one power domain per core (cpuidle)
There are two performance domains (cpufreq x 2)
So it makes sense to have one sensor per performance domain to mitigate
the temperature.
If you have access to the TRM, it contains the following line in
part 1 on page 1372:
Unfortunately no, I don't have access to the TRM. But I'll be happy if I
can ;)
Support to 7 channel TS-ADC (near chip center, A76_0/1, A76_2/3,
DSU and A55_0/1/2/3, PD_CENTER, NPU, GPU)
I assume one of "TOP" and "CENTER" is "near chip center", the other is
PD_CENTER, whatever that means (PD = power domain maybe?)
Yes certainly.
I take the opportunity to let you know there is a new tool in the linux
tools directory called 'thermometer'. You can capture the temperature
and use the data to create graphics.
I agree these could be named more descriptively.
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