Mailbox nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with a chosen interrupt
and connection to a remote processor.
As the remote processors depend on memory nodes which are only known at
the board integration level, these nodes should only be enabled when
provided with the above information.
Disable the Mailbox nodes in the dtsi files and only enable the ones that
are actually used on a given board.
Signed-off-by: Andrew Davis <afd@xxxxxx>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 12 ++++++
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 42 +--------------------
2 files changed, 14 insertions(+), 40 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 610d042ffa1d6..138381f43ce40 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -142,6 +142,7 @@ mailbox0_cluster0: mailbox@31f80000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster1: mailbox@31f81000 {
@@ -151,6 +152,7 @@ mailbox0_cluster1: mailbox@31f81000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster2: mailbox@31f82000 {
@@ -160,6 +162,7 @@ mailbox0_cluster2: mailbox@31f82000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster3: mailbox@31f83000 {
@@ -169,6 +172,7 @@ mailbox0_cluster3: mailbox@31f83000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster4: mailbox@31f84000 {
@@ -178,6 +182,7 @@ mailbox0_cluster4: mailbox@31f84000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster5: mailbox@31f85000 {
@@ -187,6 +192,7 @@ mailbox0_cluster5: mailbox@31f85000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster6: mailbox@31f86000 {
@@ -196,6 +202,7 @@ mailbox0_cluster6: mailbox@31f86000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster7: mailbox@31f87000 {
@@ -205,6 +212,7 @@ mailbox0_cluster7: mailbox@31f87000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster8: mailbox@31f88000 {
@@ -214,6 +222,7 @@ mailbox0_cluster8: mailbox@31f88000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster9: mailbox@31f89000 {
@@ -223,6 +232,7 @@ mailbox0_cluster9: mailbox@31f89000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster10: mailbox@31f8a000 {
@@ -232,6 +242,7 @@ mailbox0_cluster10: mailbox@31f8a000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
mailbox0_cluster11: mailbox@31f8b000 {
@@ -241,6 +252,7 @@ mailbox0_cluster11: mailbox@31f8b000 {
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&main_navss_intr>;
+ status = "disabled";
};
main_ringacc: ringacc@3c000000 {
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index 2d615c3e9fa10..fa44ed4c17d50 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -144,6 +144,7 @@ flash@0,0 {
};
&mailbox0_cluster0 {
+ status = "okay";
interrupts = <436>;
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
@@ -158,6 +159,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
};
&mailbox0_cluster1 {
+ status = "okay";
interrupts = <432>;
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
@@ -171,46 +173,6 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
};
};
-&mailbox0_cluster2 {
- status = "disabled";
-};
-
-&mailbox0_cluster3 {
- status = "disabled";
-};
-
-&mailbox0_cluster4 {
- status = "disabled";
-};
-
-&mailbox0_cluster5 {
- status = "disabled";
-};
-
-&mailbox0_cluster6 {
- status = "disabled";
-};
-
-&mailbox0_cluster7 {
- status = "disabled";
-};
-
-&mailbox0_cluster8 {
- status = "disabled";
-};
-
-&mailbox0_cluster9 {
- status = "disabled";
-};
-
-&mailbox0_cluster10 {
- status = "disabled";
-};
-
-&mailbox0_cluster11 {
- status = "disabled";
-};
-
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
--
2.37.3
