V4 can be found in MT7986 and MT7981 SoCs, it supports PCIe with two
lanes.
Signed-off-by: Daniel Golle <daniel@xxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
index 5613cc5106e32f..851e3dda7b638b 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
@@ -89,6 +89,11 @@ properties:
- mediatek,mt8188-tphy
- mediatek,mt8195-tphy
- const: mediatek,generic-tphy-v3
+ - items:
+ - enum:
+ - mediatek,mt7981-tphy
+ - mediatek,mt7986-tphy
+ - const: mediatek,generic-tphy-v4
- const: mediatek,mt2701-u3phy
deprecated: true
- const: mediatek,mt2712-u3phy
@@ -99,7 +104,7 @@ properties:
description:
Register shared by multiple ports, exclude port's private register.
It is needed for T-PHY V1, such as mt2701 and mt8173, but not for
- T-PHY V2/V3, such as mt2712.
+ T-PHY V2/V3/V4, such as mt2712.
maxItems: 1
"#address-cells":
--
2.37.3
