Re: [PATCH v3 3/3] arm64: dts: Add device tree for the Debix Model A Board

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Quoting Daniel Scally (2022-10-12 11:21:21)
> Add a device tree file describing the Debix Model A board from
> Polyhex Technology Co.
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> Signed-off-by: Daniel Scally <dan.scally@xxxxxxxxxxxxxxxx>

I've just applied this series to a vanilla tree, built and booted the
debix board with it.

I have working ethernet, and a console, so that's enough for me to say
this here:

Tested-by: Kieran Bingham <kieran.bingham@xxxxxxxxxxxxxxxx>

> ---
> Changes in v3 (Laurent):
> 
>     - Added IOB copyright notice
>     - Removed the eth node for the connector that's on the separate I/O
>     board
>     - Re-ordered some pinctrl groups so they're alphabetical
> 
> Changes in v2:
> 
>     - Fixed the interrupt flag for i2c1/pmic@25
>     - Fixed the node name for i2c4/rtc@51 (was "hym8563@51")
>     - Fixed a group control name that didn't match the bindings pattern
>     - Re-compared the rest of the DT with the EVK's .dts file to try to
>     make sure it complies with the way things should be, hopefully without
>     missing anything...
> 
>  arch/arm64/boot/dts/freescale/Makefile        |   1 +
>  .../dts/freescale/imx8mp-debix-model-a.dts    | 529 ++++++++++++++++++
>  2 files changed, 530 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> 
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 8bf7f7ecebaa..6a33a08946ac 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-model-a.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> new file mode 100644
> index 000000000000..5549ceea3af6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> @@ -0,0 +1,529 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2019 NXP
> + * Copyright 2022 Ideas on Board Oy
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/usb/pd.h>
> +
> +#include "imx8mp.dtsi"
> +
> +/ {
> +       model = "Polyhex Debix Model A i.MX8MPlus board";
> +       compatible = "polyhex,imx8mp-debix-model-a", "fsl,imx8mp";
> +
> +       chosen {
> +               stdout-path = &uart2;
> +       };
> +
> +       gpio-leds {
> +               compatible = "gpio-leds";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&pinctrl_gpio_led>;
> +
> +               status-led {
> +                       function = LED_FUNCTION_POWER;
> +                       color = <LED_COLOR_ID_RED>;
> +                       gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
> +                       default-state = "on";
> +               };
> +       };
> +
> +       reg_usdhc2_vmmc: regulator-usdhc2 {
> +               compatible = "regulator-fixed";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> +               regulator-name = "VSD_3V3";
> +               regulator-min-microvolt = <3300000>;
> +               regulator-max-microvolt = <3300000>;
> +               gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> +               enable-active-high;
> +       };
> +};
> +
> +&A53_0 {
> +       cpu-supply = <&buck2>;
> +};
> +
> +&A53_1 {
> +       cpu-supply = <&buck2>;
> +};
> +
> +&A53_2 {
> +       cpu-supply = <&buck2>;
> +};
> +
> +&A53_3 {
> +       cpu-supply = <&buck2>;
> +};
> +
> +&eqos {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_eqos>;
> +       phy-connection-type = "rgmii-id";
> +       phy-handle = <&ethphy0>;
> +       status = "okay";
> +
> +       mdio {
> +               compatible = "snps,dwmac-mdio";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               ethphy0: ethernet-phy@0 {
> +                       compatible = "ethernet-phy-ieee802.3-c22";
> +                       reg = <0>;
> +                       reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
> +                       reset-assert-us = <20>;
> +                       reset-deassert-us = <200000>;
> +               };
> +       };
> +};
> +
> +&i2c1 {
> +       clock-frequency = <400000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c1>;
> +       status = "okay";
> +
> +       pmic@25 {
> +               reg = <0x25>;
> +               compatible = "nxp,pca9450c";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&pinctrl_pmic>;
> +               interrupt-parent = <&gpio1>;
> +               interrupts = <3 IRQ_TYPE_EDGE_RISING>;
> +
> +               regulators {
> +                       buck1: BUCK1 {
> +                               regulator-name = "BUCK1";
> +                               regulator-min-microvolt = <600000>;
> +                               regulator-max-microvolt = <2187500>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                               regulator-ramp-delay = <3125>;
> +                       };
> +
> +                       buck2: BUCK2 {
> +                               regulator-name = "BUCK2";
> +                               regulator-min-microvolt = <600000>;
> +                               regulator-max-microvolt = <2187500>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                               regulator-ramp-delay = <3125>;
> +                               nxp,dvs-run-voltage = <950000>;
> +                               nxp,dvs-standby-voltage = <850000>;
> +                       };
> +
> +                       buck4: BUCK4{
> +                               regulator-name = "BUCK4";
> +                               regulator-min-microvolt = <600000>;
> +                               regulator-max-microvolt = <3400000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       buck5: BUCK5{
> +                               regulator-name = "BUCK5";
> +                               regulator-min-microvolt = <600000>;
> +                               regulator-max-microvolt = <3400000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       buck6: BUCK6 {
> +                               regulator-name = "BUCK6";
> +                               regulator-min-microvolt = <600000>;
> +                               regulator-max-microvolt = <3400000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       ldo1: LDO1 {
> +                               regulator-name = "LDO1";
> +                               regulator-min-microvolt = <1600000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       ldo2: LDO2 {
> +                               regulator-name = "LDO2";
> +                               regulator-min-microvolt = <800000>;
> +                               regulator-max-microvolt = <1150000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       ldo3: LDO3 {
> +                               regulator-name = "LDO3";
> +                               regulator-min-microvolt = <800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       ldo4: LDO4 {
> +                               regulator-name = "LDO4";
> +                               regulator-min-microvolt = <800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +
> +                       ldo5: LDO5 {
> +                               regulator-name = "LDO5";
> +                               regulator-min-microvolt = <1800000>;
> +                               regulator-max-microvolt = <3300000>;
> +                               regulator-boot-on;
> +                               regulator-always-on;
> +                       };
> +               };
> +       };
> +};
> +
> +&i2c2 {
> +       clock-frequency = <100000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c2>;
> +       status = "okay";
> +};
> +
> +&i2c3 {
> +       clock-frequency = <400000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c3>;
> +       status = "okay";
> +};
> +
> +&i2c4 {
> +       clock-frequency = <100000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c4>;
> +       status = "okay";
> +
> +       eeprom@50 {
> +               compatible = "atmel,24c02";
> +               reg = <0x50>;
> +               pagesize = <16>;
> +       };
> +
> +       rtc@51 {
> +               compatible = "haoyu,hym8563";
> +               reg = <0x51>;
> +               #clock-cells = <0>;
> +               clock-frequency = <32768>;
> +               clock-output-names = "xin32k";
> +               interrupt-parent = <&gpio2>;
> +               interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&pinctrl_rtc_int>;
> +       };
> +};
> +
> +&i2c6 {
> +       clock-frequency = <400000>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_i2c6>;
> +       status = "okay";
> +};
> +
> +&iomuxc {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_hog>;
> +
> +       pinctrl_eqos: eqosgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC                                                     0x3
> +                       MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO                                           0x3
> +                       MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0                                       0x91
> +                       MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1                                       0x91
> +                       MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2                                       0x91
> +                       MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3                                       0x91
> +                       MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK       0x91
> +                       MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL                         0x91
> +                       MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0                                       0x1f
> +                       MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1                                       0x1f
> +                       MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2                                       0x1f
> +                       MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3                                       0x1f
> +                       MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL                         0x1f
> +                       MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK       0x1f
> +                       MX8MP_IOMUXC_SAI1_RXFS__ENET1_1588_EVENT0_IN                            0x1f
> +                       MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT                            0x1f
> +                       MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18                                                      0x19
> +               >;
> +       };
> +
> +       pinctrl_fec: fecgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC                                                       0x3
> +                       MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO                                                      0x3
> +                       MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0                                         0x91
> +                       MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1                                         0x91
> +                       MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2                                         0x91
> +                       MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3                                         0x91
> +                       MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC                                          0x91
> +                       MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL                                      0x91
> +                       MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0                                         0x1f
> +                       MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1                                         0x1f
> +                       MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2                                         0x1f
> +                       MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3                                         0x1f
> +                       MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL                                      0x1f
> +                       MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC                                         0x1f
> +                       MX8MP_IOMUXC_SAI1_RXD1__ENET1_1588_EVENT1_OUT                           0x1f
> +                       MX8MP_IOMUXC_SAI1_RXD0__ENET1_1588_EVENT1_IN                            0x1f
> +                       MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19                                                      0x19
> +               >;
> +       };
> +
> +       pinctrl_gpio_led: gpioledgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16                                           0x19
> +               >;
> +       };
> +
> +       pinctrl_hog: hoggrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL                                     0x400001c3
> +                       MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA                                     0x400001c3
> +                       MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD                                         0x40000019
> +                       MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC                                         0x40000019
> +               >;
> +       };
> +
> +       pinctrl_i2c1: i2c1grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL                                                         0x400001c2
> +                       MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA                                                         0x400001c2
> +               >;
> +       };
> +
> +       pinctrl_i2c2: i2c2grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL                                                         0x400001c2
> +                       MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA                                                         0x400001c2
> +               >;
> +       };
> +
> +       pinctrl_i2c3: i2c3grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL                                                         0x400001c2
> +                       MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA                                                         0x400001c2
> +               >;
> +       };
> +       pinctrl_i2c4: i2c4grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL                                                         0x400001c3
> +                       MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA                                                         0x400001c3
> +               >;
> +       };
> +
> +       pinctrl_i2c6: i2c6grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL                                                        0x400001c3
> +                       MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA                                                         0x400001c3
> +               >;
> +       };
> +
> +       pinctrl_pmic: pmicirqgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03                                                     0x41
> +               >;
> +       };
> +
> +       pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19                                            0x41
> +               >;
> +       };
> +
> +       pinctrl_rtc_int: rtcintgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11                                                     0x140
> +               >;
> +       };
> +
> +       pinctrl_uart2: uart2grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX                                            0x14f
> +                       MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX                                            0x14f
> +               >;
> +       };
> +
> +       pinctrl_uart3: uart3grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX                                            0x49
> +                       MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX                                            0x49
> +               >;
> +       };
> +
> +       pinctrl_uart4: uart4grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX                                            0x49
> +                       MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX                                            0x49
> +               >;
> +       };
> +
> +       pinctrl_usb1_vbus: usb1grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25                                                       0x19
> +                       MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26                                                      0x19
> +               >;
> +       };
> +
> +       pinctrl_usdhc2: usdhc2grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                                        0x190
> +                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                                        0x1d0
> +                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                                            0x1d0
> +                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                                            0x1d0
> +                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                                            0x1d0
> +                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                                            0x1d0
> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT                                         0xc1
> +               >;
> +       };
> +
> +       pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                                        0x194
> +                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                                        0x1d4
> +                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                                            0x1d4
> +                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                                            0x1d4
> +                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                                            0x1d4
> +                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                                            0x1d4
> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT                                         0xc1
> +               >;
> +       };
> +
> +       pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                                                        0x196
> +                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                                                        0x1d6
> +                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0                                            0x1d6
> +                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1                                            0x1d6
> +                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2                                            0x1d6
> +                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3                                            0x1d6
> +                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT                                         0xc1
> +               >;
> +       };
> +
> +       pinctrl_usdhc2_gpio: usdhc2gpiogrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12                                                       0x1c4
> +               >;
> +       };
> +
> +       pinctrl_usdhc3: usdhc3grp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK                                                      0x190
> +                       MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD                                                      0x1d0
> +                       MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0                                          0x1d0
> +                       MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1                                          0x1d0
> +                       MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2                                          0x1d0
> +                       MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3                                          0x1d0
> +                       MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4                                            0x1d0
> +                       MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5                                           0x1d0
> +                       MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6                                           0x1d0
> +                       MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7                                                     0x1d0
> +                       MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE                                          0x190
> +               >;
> +       };
> +
> +       pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK                                                      0x194
> +                       MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD                                                      0x1d4
> +                       MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0                                          0x1d4
> +                       MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1                                          0x1d4
> +                       MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2                                          0x1d4
> +                       MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3                                          0x1d4
> +                       MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4                                            0x1d4
> +                       MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5                                           0x1d4
> +                       MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6                                           0x1d4
> +                       MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7                                                     0x1d4
> +                       MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE                                          0x194
> +               >;
> +       };
> +
> +       pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK                                                      0x196
> +                       MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD                                                      0x1d6
> +                       MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0                                          0x1d6
> +                       MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1                                          0x1d6
> +                       MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2                                          0x1d6
> +                       MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3                                          0x1d6
> +                       MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4                                            0x1d6
> +                       MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5                                           0x1d6
> +                       MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6                                           0x1d6
> +                       MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7                                                     0x1d6
> +                       MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE                                          0x196
> +               >;
> +       };
> +
> +       pinctrl_wdog: wdoggrp {
> +               fsl,pins = <
> +                       MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B                                           0xc6
> +               >;
> +       };
> +};
> +
> +&snvs_pwrkey {
> +       status = "okay";
> +};
> +
> +&uart2 {
> +       /* console */
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_uart2>;
> +       status = "okay";
> +};
> +
> +&uart3 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_uart3>;
> +       status = "okay";
> +};
> +
> +&uart4 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_uart4>;
> +       status = "okay";
> +};
> +
> +/* SD Card */
> +&usdhc2 {
> +       assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> +       assigned-clock-rates = <400000000>;
> +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +       pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> +       pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> +       pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> +       cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> +       vmmc-supply = <&reg_usdhc2_vmmc>;
> +       bus-width = <4>;
> +       status = "okay";
> +};
> +
> +/* eMMc */
> +&usdhc3 {
> +       assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
> +       assigned-clock-rates = <400000000>;
> +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +       pinctrl-0 = <&pinctrl_usdhc3>;
> +       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> +       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> +       bus-width = <8>;
> +       non-removable;
> +       status = "okay";
> +};
> +
> +&wdog1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_wdog>;
> +       fsl,ext-reset-output;
> +       status = "okay";
> +};
> -- 
> 2.34.1
>




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