Hi, This series contains patches related to the support of mt8365 iommu. Thanks for your feedback so far. Regards, Alex Changes in v3: - Rename "mt8365-larb-port.h" to "mediatek,mt8365-larb-port.h" - Rework the macros which retrieve larb/port ID to improve human readability - Link to v2: https://lore.kernel.org/r/20221001-iommu-support-v2-0-dbfef2eeebc9@xxxxxxxxxxxx Changes in v2: - Rebase. - Change M4U_PORT_APU_READ & M4U_PORT_APU_WRITE port to avoid display conflict in larb0. These definitions are used for vpu0 device node. - Add dual license. - Retitle commit. - Rename to int_id_port_width for more detail. - Fix typo. - Set banks_enable and banks_num in mt8365_data to fix kernel panic at boot. - Link to v1 - https://lore.kernel.org/lkml/20220530180328.845692-1-fparent@xxxxxxxxxxxx/ To: Yong Wu <yong.wu@xxxxxxxxxxxx> To: Joerg Roedel <joro@xxxxxxxxxx> To: Will Deacon <will@xxxxxxxxxx> To: Robin Murphy <robin.murphy@xxxxxxx> To: Rob Herring <robh+dt@xxxxxxxxxx> To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx> To: Matthias Brugger <matthias.bgg@xxxxxxxxx> Cc: iommu@xxxxxxxxxxxxxxx Cc: linux-mediatek@xxxxxxxxxxxxxxxxxxx Cc: devicetree@xxxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx Cc: Fabien Parent <fparent@xxxxxxxxxxxx> Cc: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx> Cc: Amjad Ouled-Ameur <aouledameur@xxxxxxxxxxxx> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx> Signed-off-by: Alexandre Mergnat <amergnat@xxxxxxxxxxxx> --- Fabien Parent (3): dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC iommu/mediatek: add support for 6-bit encoded port IDs iommu/mediatek: add support for MT8365 SoC .../devicetree/bindings/iommu/mediatek,iommu.yaml | 2 + drivers/iommu/mtk_iommu.c | 30 +++++++- .../dt-bindings/memory/mediatek,mt8365-larb-port.h | 90 ++++++++++++++++++++++ 3 files changed, 120 insertions(+), 2 deletions(-) --- base-commit: 11082343e3bf2953a937509f0316cabf69dbf908 change-id: 20221001-iommu-support-f409c7e094e6 Best regards, -- Alexandre Mergnat <amergnat@xxxxxxxxxxxx>