From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
WDT CH2 is specifically to check the operation of Cortex-M33 CPU and if
used from CA55 CPU would result in an unexpected behaviour. Hence drop
WDT2 node from RZ/V2L SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 358d4c34465f..7c7bbe377699 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -1000,21 +1000,6 @@ wdt1: watchdog@12800c00 {
status = "disabled";
};
- wdt2: watchdog@12800400 {
- compatible = "renesas,r9a07g054-wdt",
- "renesas,rzg2l-wdt";
- reg = <0 0x12800400 0 0x400>;
- clocks = <&cpg CPG_MOD R9A07G054_WDT2_PCLK>,
- <&cpg CPG_MOD R9A07G054_WDT2_CLK>;
- clock-names = "pclk", "oscclk";
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "wdt", "perrout";
- resets = <&cpg R9A07G054_WDT2_PRESETN>;
- power-domains = <&cpg>;
- status = "disabled";
- };
-
ostm0: timer@12801000 {
compatible = "renesas,r9a07g054-ostm",
"renesas,ostm";
--
2.25.1
