On Thu, Aug 25, 2022 at 09:38:32PM +0200, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx> > > Add a new binding file for Rockchip PCIe v3 phy driver. > > Signed-off-by: Frank Wunderlich <frank-w@xxxxxxxxxxxxxxx> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > --- > v4: > - add reviewed-by > - remove minitems for clock-names as i have static list to fix error > - fix reg error by using 32-bit adressing in binding example > - change lane-map to u32 data-lanes > - tried to move data-lanes to phy-provider > https://github.com/frank-w/dt-schema/blob/main/dtschema/schemas/phy/phy-provider.yaml#L17 > cloned and installed via pip install -e <local path> > verified with pip show, but phy-privider seems not to be applied > > v3: > - drop quotes > - drop rk3588 > - make clockcount fixed to 3 > - full path for binding header file > - drop phy-mode and its header and add lane-map > > v2: > dt-bindings: rename yaml for PCIe v3 > rockchip-pcie3-phy.yaml => rockchip,pcie3-phy.yaml > > changes in pcie3 phy yaml > - change clock names to ordered const list > - extend pcie30-phymode description > - add phy-cells to required properties > - drop unevaluatedProperties > - example with 1 clock each line > - use default property instead of text describing it > - update license > --- > .../bindings/phy/rockchip,pcie3-phy.yaml | 80 +++++++++++++++++++ > 1 file changed, 80 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml > new file mode 100644 > index 000000000000..9f2d8d2cc7a5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml > @@ -0,0 +1,80 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip PCIe v3 phy > + > +maintainers: > + - Heiko Stuebner <heiko@xxxxxxxxx> > + > +properties: > + compatible: > + enum: > + - rockchip,rk3568-pcie3-phy The driver also has 'rockchip,rk3588-pcie3-phy'. Please send a fix adding it here or removing from the driver. Are they not compatible with each other? Rob
