On 9/29/22 16:04, Johan Jonker wrote: > The Rockchip SoCs have 4 or more built-in PWM channels. > > Configurable to operate in capture mode. > Measures the high/low polarity effective cycles of this input waveform > Generates a single interrupt at the transition of input waveform polarity > > Configurable to operate in continuous mode or one-shot mode. > One-shot operation will produce N + 1 periods of the waveform, > where N is the repeat counter value, and generates a single interrupt at > the end of operation. > Continuous mode generates the waveform continuously and > do not generates any interrupts. > > Older SoCs have an interrupt for each node. > Newer models share an interrupt. As mentioned by Robin the common interrupt status registers are located outside the PWM node reg range. The Rockchip PWM driver is only focused on continuous mode, while these interrupts only for "Capture mode" and "One-shot mode" and need a different handling. Interrupts without reg resources is not going to work well, so I think this patch can go in the garbage bin. > > Add interrupts property to the pwm-rockchip.yaml file. > DT describes hardware. Rockchip PWM driver support for > interrupts might not available. > > Signed-off-by: Johan Jonker <jbx6244@xxxxxxxxx> > --- > Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > index f2d1dc7e7..f7634069d 100644 > --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml > @@ -37,6 +37,9 @@ properties: > reg: > maxItems: 1 > > + interrupts: > + maxItems: 1 > + > clocks: > minItems: 1 > maxItems: 2
