This patchset is a third one in the series created in the framework of my Baikal-T1 DDRC-related work: [1: In-progress] EDAC/mc/synopsys: Various fixes and cleanups Link: https://lore.kernel.org/linux-edac/20220929232712.12202-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx [2: In-progress] EDAC/synopsys: Add generic DDRC info and address mapping Link: https://lore.kernel.org/linux-edac/20220929233530.13016-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx [3: In-progress] EDAC/synopsys: Add generic resources and Baikal-T1 support Link: ---you are looking at it--- Note the patchsets above must be merged in the same order as they are placed in the list in order to prevent conflicts. Nothing prevents them from being reviewed synchronously though. Any tests are very welcome. Thanks in advance. This is a final patchset in the framework of my Synopsys DW uMCTL2 DDRC work, which completes the driver updates with the new functionality and at the closure introduces the Baikal-T1 DDRC support. The series starts from extending the Synopsys DW uMCTL2 DDRC DT-schema with the controller specific IRQs, clocks and resets properties. In addition to the Baikal-T1 DDRC is added to the DT-bindings since it's based on the DW uMCTL2 DDRC v2.61a. After that we suggest to finally inform the MCI core with the detected SDRAM ranks and make sure the detected errors are reported to the corresponding rank. Then we extend the DDRC capabilities with optional Scrub functionality. It's indeed possible to have the DW uMCTL2 controller with no HW-accelerated Scrub support (no RMW engine). In that case the MCI core is supposed to perform the erroneous location ECC update by means of the platform-specific scrub method. Then we get to fix the error-injection functionality a bit. First since the driver now has the Sys<->SDRAM address translation infrastructure we can use it to convert the supplied poisonous system address to the SDRAM one. Thus there is no longer need in preserving the address in the device private data. Second we suggest to add a DebuFS node-based command to disable the error-injection feature (no idea why it hasn't been done in the first place). Afterwards a series of the IRQ-related patches goes. First we introduce the individual DDRC event IRQs support in accordance with what has been added to the DT-bindings and what the native DW uMCTL2 DDR controller actually provides. Then aside to the ECC CE/UE errors detection we suggest to the DFI/SDRAM CRC/Parity errors report. It specifically useful for the DDR4 memory which has dedicated ALARM_n signal, but can be still utilized in the framework of the older protocols if the device DFI-PHY calculates the HIF-interface signals parity. Third after adding the platform clock/resets request procedure we introduce the HW-accelerated Scrubber support. Its performance can be tuned by means of the sdram_scrub_rate SysFS node and the Core clock rate. Note it is possible to one-time-run the Scrubber in the back-to-back mode so to perform a burst-like scan of the whole SDRAM memory. At the patchset closure we finally fix the DW uMCTL2 DDRC kernel config to be available not only on the Xilinx, Intel and MXC platforms and add the Baikal-T1 DDRC support which the whole work has been dedicated for in the first place. Link: https://lore.kernel.org/linux-edac/20220822191957.28546-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/ Changelog v2: - Replace "snps,ddrc-3.80a" compatible string with "snps,dw-umctl2-ddrc" in the example. - Move unrelated changes in to the dedicated patches. (@Krzysztof) - Use the IRQ macros in the example. (@Krzysztof) - Add a new patch: [PATCH v2 01/15] dt-bindings: memory: snps: Replace opencoded numbers with macros (@Krzysztof) - Add a new patch: [PATCH v2 03/15] dt-bindings: memory: snps: Convert the schema to being generic (@Krzysztof) - Drop the PHY CSR region. (@Rob) - Move the Baikal-T1 DDRC bindings to the separate DT-schema. Link: https://lore.kernel.org/linux-edac/20220910195659.11843-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx Changelog v3: - Create common DT-schema instead of using the generic device DT-bindings. (@Rob) - Drop the merged in patches: [PATCH v2 01/15] dt-bindings: memory: snps: Replace opencoded numbers with macros [PATCH v2 02/15] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props (@Krzysztof) Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> Cc: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> Cc: Michail Ivanov <Michail.Ivanov@xxxxxxxxxxxxxxxxxxxx> Cc: Pavel Parkhomenko <Pavel.Parkhomenko@xxxxxxxxxxxxxxxxxxxx> Cc: Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@xxxxxxxxxx> Cc: Manish Narani <manish.narani@xxxxxxxxxx> Cc: Dinh Nguyen <dinguyen@xxxxxxxxxx> Cc: James Morse <james.morse@xxxxxxx> Cc: Robert Richter <rric@xxxxxxxxxx> Cc: Rob Herring <robh@xxxxxxxxxx> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Cc: devicetree@xxxxxxxxxxxxxxx Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx Cc: linux-edac@xxxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx Serge Semin (13): dt-bindings: memory: snps: Convert the schema to being generic dt-bindings: memory: Add Baikal-T1 DDRC DT-schema EDAC/synopsys: Add multi-ranked memory support EDAC/synopsys: Add optional ECC Scrub support EDAC/synopsys: Drop ECC poison address from private data EDAC/synopsys: Add data poisoning disable support EDAC/synopsys: Split up ECC UE/CE IRQs handler EDAC/synopsys: Add individual named ECC IRQs support EDAC/synopsys: Add DFI alert_n IRQ support EDAC/synopsys: Add reference clocks support EDAC/synopsys: Add ECC Scrubber support EDAC/synopsys: Drop vendor-specific arch dependency EDAC/synopsys: Add Baikal-T1 DDRC support .../memory-controllers/baikal,bt1-ddrc.yaml | 91 ++ .../snps,dw-umctl2-common.yaml | 75 ++ .../snps,dw-umctl2-ddrc.yaml | 57 +- drivers/edac/Kconfig | 1 - drivers/edac/synopsys_edac.c | 952 ++++++++++++++---- 5 files changed, 933 insertions(+), 243 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/baikal,bt1-ddrc.yaml create mode 100644 Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-common.yaml -- 2.37.3
