Add bindings for the reset controller on the JH7110 RISC-V SoC by StarFive Technology Ltd. Signed-off-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxxxxxxxx> --- .../bindings/reset/starfive,jh7110-reset.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/starfive,jh7110-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/starfive,jh7110-reset.yaml b/Documentation/devicetree/bindings/reset/starfive,jh7110-reset.yaml new file mode 100644 index 000000000000..bb0010c200f9 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/starfive,jh7110-reset.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/starfive,jh7110-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7110 SoC Reset Controller Device Tree Bindings + +maintainers: + - Emil Renner Berthing <kernel@xxxxxxxx> + - Hal Feng <hal.feng@xxxxxxxxxxxxxxxxxxxxxx> + +properties: + compatible: + enum: + - starfive,jh7110-reset + + "#reset-cells": + const: 1 + + starfive,assert-offset: + description: Offset of the first ASSERT register + $ref: /schemas/types.yaml#/definitions/uint32 + + starfive,status-offset: + description: Offset of the first STATUS register + $ref: /schemas/types.yaml#/definitions/uint32 + + starfive,nr-resets: + description: Number of reset signals + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - "#reset-cells" + - starfive,assert-offset + - starfive,status-offset + - starfive,nr-resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/starfive-jh7110.h> + + syscrg_rst: reset-controller@13020000 { + compatible = "starfive,jh7110-reset"; + #reset-cells = <1>; + starfive,assert-offset = <0x2F8>; + starfive,status-offset= <0x308>; + starfive,nr-resets = <JH7110_SYSRST_END>; + }; + +... -- 2.17.1
