Hi Laurent,
On 9/28/22 18:42, Laurent Pinchart wrote:
On Wed, Sep 28, 2022 at 06:58:10PM +0300, Laurent Pinchart wrote:
Hi Sai,
On Fri, Jun 17, 2022 at 04:16:55PM +0530, Sai Krishna Potthuri wrote:
This series update the Xilinx firmware, ZynqMP dt-binding and ZynqMP
pinctrl driver to handle 'output-enable' and 'bias-high-impedance'
configurations. As part of these configurations, ZynqMP pinctrl driver
takes care of pin tri-state setting.
Also fix the kernel doc warning in ZynqMP pinctrl driver.
I'm afraid this causes a regression :-( With this series applied, boot
breaks with the following message being printed to the serial console:
Received exception
MSR: 0x200, EAR: 0xFF180198, EDR: 0x0, ESR: 0x64
I've traced that to the probe of the UART, when it calls into the
firmware to set pin MIO18 to high impedance. According to v1.7 of the
ZynqMP registers reference (UG1087), there is no register at address
0xFF180198.
I am using the VCU TRD 2021.1 for testing. Does this series require a
firmware update ? If so backward compatibility needs to be preserved.
It's very late in the v6.0-rc cycle for a fix, a revert may be best at
this point, to give us time to fix the issue properly.
I've now tested the VCU TRD 2022.1 (which AFAIK is the latest available
version), and the problem doesn't occue then. It thus seems this depends
on a firmware update, which is impractical at best for all old designs
:-(
That's correct observation. Supporting these two properties requires newer pmufw
or that message is received.
I will let Arun and Jyotheeswar to comment it. I don't think there is a way to
detect which firmware has implementation for it available.
Thanks,
Michal
