On Thu, 22 Sep 2022 12:12:40 -0400, Frank Li <Frank.Li@xxxxxxx> wrote: > > > > ┌───────┐ ┌──────────┐ > │ │ │ │ > ┌─────────────┐ │ │ │ PCI Host │ > │ MSI │◄┐ │ │ │ │ > │ Controller │ │ │ │ │ │ > └─────────────┘ └─┼───────┼──────────┼─Bar0 │ > │ PCI │ │ Bar1 │ > │ Func │ │ Bar2 │ > │ │ │ Bar3 │ > │ │ │ Bar4 │ > │ ├─────────►│ │ > └───────┘ └──────────┘ > > Many PCI controllers provided Endpoint functions. > Generally PCI endpoint is hardware, which is not running a rich OS, > like linux. > > But Linux also supports endpoint functions. PCI Host write BAR<n> space > like write to memory. The EP side can't know memory changed by the Host > driver. > > PCI Spec has not defined a standard method to do that. Only define > MSI(x) to let EP notified RC status change. [...] FWIW, I have queued the first 4 patches of this series into -next. If there is a need for these patches to be pulled by another subsystem, I have pushed out a stable branch at [1]. Thanks, M. [1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/fsl-mu-msi -- Without deviation from the norm, progress is not possible.
