Hi Geert, On Thu, Sep 22, 2022 at 1:51 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > On Thu, Sep 22, 2022 at 2:34 PM Sakari Ailus > <sakari.ailus@xxxxxxxxxxxxxxx> wrote: > > On Thu, Sep 22, 2022 at 01:08:33PM +0100, Lad, Prabhakar wrote: > > > > > * Switched to manually turn ON/OFF the clocks instead of pm_runtime so that > > > > > the mipi/dhpy initialization happens as per the HW manual > > > > > > > > That doesn't look right. The driver doesn't use runtime PM anymore, so > > > > power domains may not be handled properly. What was the problem with > > > > clock handling using runtime PM ? > > > > > > > If we use the runtime PM all the clocks will be turned ON when we call > > > pm_runtime_resume_and_get() which I dont want to. As per the "Starting > > > reception for MIPI CSI-2 Input" section 35.3.1 for example we first > > > need to turn ON all the clocks and later further down the line we need > > > to just turn OFF VCLK -> Enable Link -> turn ON VCLK. Due to such > > > cases I have switched to individual clock handling. > > > > If that is the case, then you should control just that clock directly, > > outside runtime PM callbacks. > > > > Runtime PM may be needed e.g. for resuming a parent device. > > Exactly. > So probably you should not consider R9A07G044_CRU_VCLK a PM clock, > i.e. you need changes to rzg2l_cpg_is_pm_clk() to exclude it. > Thanks for the pointer. In that case we will have to consider R9A07G044_CRU_VCLK and R9A07G044_CRU_SYSCLK as not PM clocks. Does the below sound good? - DEF_NO_PM() macro - bool is_pm_clk in struct rzg2l_mod_clk. I still have to implement it, just wanted your opinion beforehand. Cheers, Prabhakar
