This series of patches introduces the GCLK as a clock source for the baudrate generator of UART on sama5d2 SoCs. Unlike the serial mode of the USART offered by FLEXCOM, the UART does not provide a fractional part that can be added to the clock divisor to obtain a more accurate result, which greatly decreases the flexibility available for producing a higher variety of baudrates. Now, with the last patch of the series, the driver will check for a GCLK in the DT. If provided, whenever `atmel_set_termios` is called, unless there is a fractional part, the driver will compare the error rate between the desired baudrate and the actual baudrate obtained through each of the available clock sources and will choose the clock source with the lowest error rate. While at it, convert the DT binding for UART/USART to json-schema, update the FLEXCOM binding to reference the new UART/USART binding (while differentiating between the SPI of USART and the SPI of FLEXCOM), do some small DT related fixups and do some small driver cleanup. The DT bindings related patches of this patch series depend on this patch series converting atmel-flexcom bindings to json-schema: https://lore.kernel.org/linux-arm-kernel/20220916075744.1879428-1-kavyasree.kotagiri@xxxxxxxxxxxxx/ v1 -> v2: - [PATCH 3] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding: - use full schema paths - [PATCH 5] dt-bindings: serial: atmel,at91-usart: convert to json-schema - only do what the commit says, split the addition of other compatibles (PATCH 6) and properties (PATCH 13) in other patches - remove unnecessary "|"'s - mention header in `atmel,usart-mode`'s description - place `if:` under `allOf:` - respect order of spi0's DT properties: compatible, then reg then the reset of properties - two new baudrate clock source related patches: [PATCH 9] tty: serial: atmel: Add definition for GCLK as baudrate source clock + [PATCH 10] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register: - v1's bitfield definition of GCLK was wrong, so add two more patches: - one for the definition of GCLK of USART IP's - one for the definition of BRSRCCK bitmask and its bitfields for UART IP's - a new cleanup related patch that introduces a new struct atmel_uart_port field: [PATCH 11] tty: serial: atmel: Only divide Clock Divisor if the IP is USART: - this ensures a division by 8 which is unnecessary and unappliable to UART IP's is only done for USART IP's - four new patches regarding DT fixes and a SPI binding update that I came upon: [PATCH 1] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties [PATCH 2] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 [PATCH 4] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 [PATCH 6] dt-bindings: serial: atmel,at91-usart: Highlight SAM9X60 incremental - [PATCH 12] tty: serial: atmel: Make the driver aware of the existence of GCLK - take into account the different placement of the baudrate clock source into the IP's Mode Register (USART vs UART) - don't check for atmel_port->gclk != NULL - use clk_round_rate instead of clk_set_rate + clk_get_rate - remove clk_disable_unprepare from the end of the probe method v2 -> v3: - Re-order the patches as suggested by Krzysztof Kozlowski: 1. DTS changes needed for aligning to schema. 2. all bindings 3. rest - New DT consistency related patch: [PATCH 3] ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes - [PATCH 6] dt-bindings: serial: atmel,at91-usart: convert to json-schema: - Check value of `atmel,usart-mode` instead of the node regex - Define all properties top level and disallow them explicitly for other type, since additionalProperties:false conflicts with referencing other schemas - Remove useless else if: after else: - [PATCH 7] dt-bindings: serial: atmel,at91-usart: add SAM9260 compatibles to SAM9X60: - Use the commit message suggested by Krzysztof Kozlowski - [PATCH 8] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding - Compare devices based on the compatible instead of the clock - [PATCH 12] tty: serial: atmel: Only divide Clock Divisor if the IP is USART - Use ATMEL_US_CD instead of 65535 - [PATCH 14] tty: serial: atmel: Make the driver aware of the existence of GCLK - add `gclk_fail` goto - replace `goto err` with `goto err_clk_disable_unprepare;` v3 -> v4: - Remove the first 4 patches as they have already been applied https://lore.kernel.org/linux-arm-kernel/b537bbcf-cb0f-551d-6dd0-cf50864bafa3@xxxxxxxxxxxxx/ https://lore.kernel.org/linux-arm-kernel/53e72e5d-47fc-403d-c969-61b267a9ff15@xxxxxxxxxxxxx/ https://lore.kernel.org/linux-arm-kernel/1ae89854-74fa-6194-304f-db31d56d3674@xxxxxxxxxxxxx/ https://lore.kernel.org/linux-arm-kernel/3234cd79-65db-1210-50c1-e880ec6d87a0@xxxxxxxxxxxxx/ - Remove the addition of gclk's to sama5d2 clock driver as it has already been applied https://lore.kernel.org/linux-arm-kernel/4b23db7d-d6b2-6c93-01f7-6a3b86f403d1@xxxxxxxxxxxxx/ - [PATCH 2] -> [PATCH 5] - add Acked-by/Reviewed-by tags to DT bindings - [PATCH 8] - replace & with min_t v4 -> v5: - squash previous `[PATCH v4 7/9] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register` into a newly added `[PATCH v5 6/9] tty: serial: atmel: Separate mode clearing between UART and USART` whose role is mainly of cleanup and to make a clear separation between the clearing of the mode for UART vs USART and make BRSRCCK into a bitfield instead of a bitmask as it is only a bit. - squash previous `[PATCH v4 6/9] tty: serial: atmel: Define GCLK as USART baudrate source clock` into the current `[PATCH v5 8/9] tty: serial: atmel: Make the driver aware of the existence of GCLK` - new bitfield conversions to FIELD_PREP/FIELD_GET PATCH `[PATCH v5 9/9] tty: serial: atmel: Use FIELD_PREP/FIELD_GET` Sergiu Moga (9): dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding dt-bindings: serial: atmel,at91-usart: convert to json-schema dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock tty: serial: atmel: Separate mode clearing between UART and USART tty: serial: atmel: Only divide Clock Divisor if the IP is USART tty: serial: atmel: Make the driver aware of the existence of GCLK tty: serial: atmel: Use FIELD_PREP/FIELD_GET .../bindings/mfd/atmel,sama5d2-flexcom.yaml | 19 +- .../devicetree/bindings/mfd/atmel-usart.txt | 98 --------- .../bindings/serial/atmel,at91-usart.yaml | 190 ++++++++++++++++++ drivers/tty/serial/atmel_serial.c | 82 +++++++- drivers/tty/serial/atmel_serial.h | 75 +++---- 5 files changed, 321 insertions(+), 143 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-usart.txt create mode 100644 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml -- 2.34.1
