On Thu, 15 Sep 2022 16:34:30 +0200, Johan Hovold wrote:
> The size of the PCIe PHY serdes register region is 0x1c4 and the
> corresponding 'reg' property should specifically not include the
> adjacent regions that are defined in the child node (e.g. tx and rx).
>
>
Applied, thanks!
[1/2] arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size
commit: ed22cc93abae68f9d3fc4957c20a1d902cf28882
[2/2] arm64: dts: qcom: sm8540: fix UFS PHY serdes size
commit: 677920072e9d757ae158d66b8fdb695992bb3f1a
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
