On Wed, Sep 14, 2022 at 03:09:06PM +0530, Siddharth Vadapalli wrote: > TI's J721e SoC supports additional PHY modes like QSGMII and SGMII > that are not supported on earlier SoCs. Add a compatible for it. > > Extend ti,qsgmii-main-ports property to support selection of upto > two main ports at once across the two QSGMII interfaces. > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx> > --- > .../bindings/phy/ti,phy-gmii-sel.yaml | 52 ++++++++++++++++--- > 1 file changed, 46 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml > index da7cac537e15..1e19efab018b 100644 > --- a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml > +++ b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml > @@ -54,6 +54,7 @@ properties: > - ti,dm814-phy-gmii-sel > - ti,am654-phy-gmii-sel > - ti,j7200-cpsw5g-phy-gmii-sel > + - ti,j721e-cpsw9g-phy-gmii-sel > > reg: > maxItems: 1 > @@ -65,12 +66,19 @@ properties: > description: | > Required only for QSGMII mode. Array to select the port for > QSGMII main mode. Rest of the ports are selected as QSGMII_SUB > - ports automatically. Any one of the 4 CPSW5G ports can act as the > - main port with the rest of them being the QSGMII_SUB ports. > - maxItems: 1 > - items: > - minimum: 1 > - maximum: 4 > + ports automatically. For J7200 CPSW5G with the compatible: > + ti,j7200-cpsw5g-phy-gmii-sel, ti,qsgmii-main-ports is an > + array of only one element, which is the port number ranging from > + 1 to 4. For J721e CPSW9G with the compatible: > + ti,j721e-cpsw9g-phy-gmii-sel, ti,qsgmii-main-ports is an array > + of two elements, which corresponds to two potential QSGMII main > + ports. The first element and second element of the array can both > + range from 1 to 8 each, corresponding to two QSGMII main ports. > + For J721e CPSW9G, to configure port 2 as the first QSGMII main > + port and port 7 as the second QSGMII main port, we specify: > + ti,qsgmii-main-ports = <2>, <7>; > + If only one QSGMII main port is desired, mention the same main > + port twice. Two different forms for the same property name is not great. Just make a new property if you need something different. Rob
