Il 17/08/22 10:07, bchihi@xxxxxxxxxxxx ha scritto:
From: Alexandre Bailon <abailon@xxxxxxxxxxxx>
Add dt-binding document for mt8192 and mt8195 LVTS thermal controllers.
Signed-off-by: Alexandre Bailon <abailon@xxxxxxxxxxxx>
Co-developed-by: Balsam CHIHI <bchihi@xxxxxxxxxxxx>
Signed-off-by: Balsam CHIHI <bchihi@xxxxxxxxxxxx>
---
.../thermal/mediatek,lvts-thermal.yaml | 152 ++++++++++++++++++
1 file changed, 152 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
new file mode 100644
index 000000000000..31d9e220513a
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
@@ -0,0 +1,152 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek SoC LVTS thermal controller
title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
+
+maintainers:
+ - Yu-Chia Chang <ethan.chang@xxxxxxxxxxxx>
+ - Ben Tseng <ben.tseng@xxxxxxxxxxxx>
+
+description: |
description:
LVTS is a thermal management architecture composed of three subsystems,
a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
a Convertor - Low Voltage Thermal Sensor convertor (LVTS), and
a Digital controller (LVTS_CTRL).
+ LVTS (Low Voltage Thermal Sensor).
+ The architecture will be first used on mt8192 and mt8195.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8192-lvts-ap
+ - mediatek,mt8192-lvts-mcu
+ - mediatek,mt8195-lvts-ap
+ - mediatek,mt8195-lvts-mcu
+
+ "#thermal-sensor-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+ description: LVTS instance registers.
This description looks obvious, as it doesn't really say anything "new"...
I would rather drop it.
+
+ interrupts:
+ maxItems: 1
+ description: LVTS instance interrupts.
Same here
+
+ clocks:
+ maxItems: 1
+ description: LVTS instance clock.
and here.
+
+ resets:
+ maxItems: 1
+ description: |
+ LVTS instance SW reset for HW AP/MCU domain to clean temporary data
+ on HW initialization/resume.
What about something like...
resets:
items:
- description: LVTS reset for clearing temporary data on AP/MCU
+
+ nvmem-cells:
+ minItems: 1
+ maxItems: 2
+ description: Calibration efuse data for LVTS
nvmem-cells:
minItems: 1
items:
- description: Calibration eFuse data for LVTS
- description: Additional eFuse data (?)
+
+ nvmem-cell-names:
+ minItems: 1
+ maxItems: 2
+ description: Calibration efuse cell names for LVTS
Actually, maxItems is not really two, but it depends on how many
eFuse arrays / nvmem cells we have for each SoC, so I was thinking...
...what about doing something like
nvmem-cell-names:
minItems: 1
items:
pattern: 'lvts-calib-data[0-9]+$'
and then,
if:
properties:
compatible:
contains:
enum:
- mediatek,blahblah-something
then:
properties:
nvmem-cell-names:
maxItems: 2 (or 3, 4, 5...)
P.S.: I haven't tried any binding check on the proposed lines.
Krzysztof, any opinions on that?
Regards,
Angelo
