Hello, > Hi Anton, > > On 13.10.2014 06:54, Anton Tikhomirov wrote: > > Hi Vivek, > > > >> Exynos7 also has a separate special gate clock going to the IP > >> apart from the usual AHB clock. So add support for the same. > > > > As we discussed before, Exynos7 SoCs have 7 clocks to be controlled > > by the driver. Adding only sclk is not enough. > > > > I'm quite interested in this discussion. Has it happened on mailing > lists? No, we used company messenger for the discussion. > > In general, previous SoCs also gave the possibility of controlling all > the bus clocks separately, in addition to bulk gates, but there was no correct > real advantage in using those, while burdening the clock tree with > numerous clocks. Isn't Exynos7 similar in this aspect? Exynos7 doesn't have "Gating all clocks for USBDRD30" bit. The clocks should be controlled separately. > > Best regards, > Tomasz > -- > To unsubscribe from this list: send the line "unsubscribe linux-usb" in > the body of a message to majordomo@xxxxxxxxxxxxxxx > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
