On 13/09/2022 11:29, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@xxxxxxx> > > i.MX8M Family features an anatop module the produces PLL to clock > control module(CCM) root clock. Add the missing yaml file. > > Signed-off-by: Peng Fan <peng.fan@xxxxxxx> > --- > > V2: > Drop syscon, use clock-controller > Add fsl vendor prefix > Add interrupt property > > dts update not included, so there will be dtbs_check fail. > > .../bindings/clock/fsl,imx8m-anatop.yaml | 46 +++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > > diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > new file mode 100644 > index 000000000000..2c0efa58d898 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml > @@ -0,0 +1,46 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX8M Family Anatop Module > + > +maintainers: > + - Peng Fan <peng.fan@xxxxxxx> > + > +description: | > + NXP i.MX8M Family anatop PLL module which generates PLL to CCM root. > + > +properties: > + compatible: > + oneOf: > + - enum: > + - fsl,imx8mm-anatop > + - fsl,imx8mq-anatop > + - items: > + - enum: > + - fsl,imx8mn-anatop > + - fsl,imx8mp-anatop > + - const: fsl,imx8mm-anatop You dropped syscon which solves part of my previous comment. I suggested to make it proper clock provider, so you would need clock-cells. Any reason it is no a real clock provider? Best regards, Krzysztof
